memory: move jedec_ddr_data.c from lib/ to drivers/memory/
authorMasahiro Yamada <yamada.masahiro@socionext.com>
Mon, 3 Jun 2019 08:12:32 +0000 (17:12 +0900)
committerOlof Johansson <olof@lixom.net>
Mon, 17 Jun 2019 11:45:17 +0000 (04:45 -0700)
jedec_ddr_data.c exports 3 symbols, and all of them are only
referenced from drivers/memory/{emif.c,of_memory.c}

drivers/memory/ is a better location than lib/.

I removed the Kconfig prompt "JEDEC DDR data" because it is only
select'ed by TI_EMIF, and there is no other user. There is no good
reason in making it a user-configurable CONFIG option.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
drivers/memory/Kconfig
drivers/memory/Makefile
drivers/memory/jedec_ddr_data.c [new file with mode: 0644]
lib/Kconfig
lib/Makefile
lib/jedec_ddr_data.c [deleted file]

index 392ad4f5c57070957ac0cfdc9f9b22997840bf37..477f0f130e5b8d89c437d4b8ba9a5e71dcb98a05 100644 (file)
@@ -8,6 +8,14 @@ menuconfig MEMORY
 
 if MEMORY
 
+config DDR
+       bool
+       help
+         Data from JEDEC specs for DDR SDRAM memories,
+         particularly the AC timing parameters and addressing
+         information. This data is useful for drivers handling
+         DDR SDRAM controllers.
+
 config ARM_PL172_MPMC
        tristate "ARM PL172 MPMC driver"
        depends on ARM_AMBA && OF
index 91ae4eb0e9137423bf75183b4790eb69bd426374..9d5c409a15916f44fb69111b6e886b037320e8b9 100644 (file)
@@ -3,6 +3,7 @@
 # Makefile for memory devices
 #
 
+obj-$(CONFIG_DDR)              += jedec_ddr_data.o
 ifeq ($(CONFIG_DDR),y)
 obj-$(CONFIG_OF)               += of_memory.o
 endif
diff --git a/drivers/memory/jedec_ddr_data.c b/drivers/memory/jedec_ddr_data.c
new file mode 100644 (file)
index 0000000..6d2cbf1
--- /dev/null
@@ -0,0 +1,135 @@
+/*
+ * DDR addressing details and AC timing parameters from JEDEC specs
+ *
+ * Copyright (C) 2012 Texas Instruments, Inc.
+ *
+ * Aneesh V <aneesh@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <memory/jedec_ddr.h>
+#include <linux/module.h>
+
+/* LPDDR2 addressing details from JESD209-2 section 2.4 */
+const struct lpddr2_addressing
+       lpddr2_jedec_addressing_table[NUM_DDR_ADDR_TABLE_ENTRIES] = {
+       {B4, T_REFI_15_6, T_RFC_90}, /* 64M */
+       {B4, T_REFI_15_6, T_RFC_90}, /* 128M */
+       {B4, T_REFI_7_8,  T_RFC_90}, /* 256M */
+       {B4, T_REFI_7_8,  T_RFC_90}, /* 512M */
+       {B8, T_REFI_7_8, T_RFC_130}, /* 1GS4 */
+       {B8, T_REFI_3_9, T_RFC_130}, /* 2GS4 */
+       {B8, T_REFI_3_9, T_RFC_130}, /* 4G */
+       {B8, T_REFI_3_9, T_RFC_210}, /* 8G */
+       {B4, T_REFI_7_8, T_RFC_130}, /* 1GS2 */
+       {B4, T_REFI_3_9, T_RFC_130}, /* 2GS2 */
+};
+EXPORT_SYMBOL_GPL(lpddr2_jedec_addressing_table);
+
+/* LPDDR2 AC timing parameters from JESD209-2 section 12 */
+const struct lpddr2_timings
+       lpddr2_jedec_timings[NUM_DDR_TIMING_TABLE_ENTRIES] = {
+       /* Speed bin 400(200 MHz) */
+       [0] = {
+               .max_freq       = 200000000,
+               .min_freq       = 10000000,
+               .tRPab          = 21000,
+               .tRCD           = 18000,
+               .tWR            = 15000,
+               .tRAS_min       = 42000,
+               .tRRD           = 10000,
+               .tWTR           = 10000,
+               .tXP            = 7500,
+               .tRTP           = 7500,
+               .tCKESR         = 15000,
+               .tDQSCK_max     = 5500,
+               .tFAW           = 50000,
+               .tZQCS          = 90000,
+               .tZQCL          = 360000,
+               .tZQinit        = 1000000,
+               .tRAS_max_ns    = 70000,
+               .tDQSCK_max_derated = 6000,
+       },
+       /* Speed bin 533(266 MHz) */
+       [1] = {
+               .max_freq       = 266666666,
+               .min_freq       = 10000000,
+               .tRPab          = 21000,
+               .tRCD           = 18000,
+               .tWR            = 15000,
+               .tRAS_min       = 42000,
+               .tRRD           = 10000,
+               .tWTR           = 7500,
+               .tXP            = 7500,
+               .tRTP           = 7500,
+               .tCKESR         = 15000,
+               .tDQSCK_max     = 5500,
+               .tFAW           = 50000,
+               .tZQCS          = 90000,
+               .tZQCL          = 360000,
+               .tZQinit        = 1000000,
+               .tRAS_max_ns    = 70000,
+               .tDQSCK_max_derated = 6000,
+       },
+       /* Speed bin 800(400 MHz) */
+       [2] = {
+               .max_freq       = 400000000,
+               .min_freq       = 10000000,
+               .tRPab          = 21000,
+               .tRCD           = 18000,
+               .tWR            = 15000,
+               .tRAS_min       = 42000,
+               .tRRD           = 10000,
+               .tWTR           = 7500,
+               .tXP            = 7500,
+               .tRTP           = 7500,
+               .tCKESR         = 15000,
+               .tDQSCK_max     = 5500,
+               .tFAW           = 50000,
+               .tZQCS          = 90000,
+               .tZQCL          = 360000,
+               .tZQinit        = 1000000,
+               .tRAS_max_ns    = 70000,
+               .tDQSCK_max_derated = 6000,
+       },
+       /* Speed bin 1066(533 MHz) */
+       [3] = {
+               .max_freq       = 533333333,
+               .min_freq       = 10000000,
+               .tRPab          = 21000,
+               .tRCD           = 18000,
+               .tWR            = 15000,
+               .tRAS_min       = 42000,
+               .tRRD           = 10000,
+               .tWTR           = 7500,
+               .tXP            = 7500,
+               .tRTP           = 7500,
+               .tCKESR         = 15000,
+               .tDQSCK_max     = 5500,
+               .tFAW           = 50000,
+               .tZQCS          = 90000,
+               .tZQCL          = 360000,
+               .tZQinit        = 1000000,
+               .tRAS_max_ns    = 70000,
+               .tDQSCK_max_derated = 5620,
+       },
+};
+EXPORT_SYMBOL_GPL(lpddr2_jedec_timings);
+
+const struct lpddr2_min_tck lpddr2_jedec_min_tck = {
+       .tRPab          = 3,
+       .tRCD           = 3,
+       .tWR            = 3,
+       .tRASmin        = 3,
+       .tRRD           = 2,
+       .tWTR           = 2,
+       .tXP            = 2,
+       .tRTP           = 2,
+       .tCKE           = 3,
+       .tCKESR         = 3,
+       .tFAW           = 8
+};
+EXPORT_SYMBOL_GPL(lpddr2_jedec_min_tck);
index 90623a0e1942b28994b4dce60abe599d35cc3d43..e09b3e081a53f1100cf87a9c936f50ed991cea39 100644 (file)
@@ -531,14 +531,6 @@ config LRU_CACHE
 config CLZ_TAB
        bool
 
-config DDR
-       bool "JEDEC DDR data"
-       help
-         Data from JEDEC specs for DDR SDRAM memories,
-         particularly the AC timing parameters and addressing
-         information. This data is useful for drivers handling
-         DDR SDRAM controllers.
-
 config IRQ_POLL
        bool "IRQ polling library"
        help
index fb7697031a797f0f4c73a5e4e7a611a231c93947..cb66bc9c5b2fda11e54795f064e59089e3ea6f6c 100644 (file)
@@ -206,8 +206,6 @@ obj-$(CONFIG_SIGNATURE) += digsig.o
 
 lib-$(CONFIG_CLZ_TAB) += clz_tab.o
 
-obj-$(CONFIG_DDR) += jedec_ddr_data.o
-
 obj-$(CONFIG_GENERIC_STRNCPY_FROM_USER) += strncpy_from_user.o
 obj-$(CONFIG_GENERIC_STRNLEN_USER) += strnlen_user.o
 
diff --git a/lib/jedec_ddr_data.c b/lib/jedec_ddr_data.c
deleted file mode 100644 (file)
index 6d2cbf1..0000000
+++ /dev/null
@@ -1,135 +0,0 @@
-/*
- * DDR addressing details and AC timing parameters from JEDEC specs
- *
- * Copyright (C) 2012 Texas Instruments, Inc.
- *
- * Aneesh V <aneesh@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <memory/jedec_ddr.h>
-#include <linux/module.h>
-
-/* LPDDR2 addressing details from JESD209-2 section 2.4 */
-const struct lpddr2_addressing
-       lpddr2_jedec_addressing_table[NUM_DDR_ADDR_TABLE_ENTRIES] = {
-       {B4, T_REFI_15_6, T_RFC_90}, /* 64M */
-       {B4, T_REFI_15_6, T_RFC_90}, /* 128M */
-       {B4, T_REFI_7_8,  T_RFC_90}, /* 256M */
-       {B4, T_REFI_7_8,  T_RFC_90}, /* 512M */
-       {B8, T_REFI_7_8, T_RFC_130}, /* 1GS4 */
-       {B8, T_REFI_3_9, T_RFC_130}, /* 2GS4 */
-       {B8, T_REFI_3_9, T_RFC_130}, /* 4G */
-       {B8, T_REFI_3_9, T_RFC_210}, /* 8G */
-       {B4, T_REFI_7_8, T_RFC_130}, /* 1GS2 */
-       {B4, T_REFI_3_9, T_RFC_130}, /* 2GS2 */
-};
-EXPORT_SYMBOL_GPL(lpddr2_jedec_addressing_table);
-
-/* LPDDR2 AC timing parameters from JESD209-2 section 12 */
-const struct lpddr2_timings
-       lpddr2_jedec_timings[NUM_DDR_TIMING_TABLE_ENTRIES] = {
-       /* Speed bin 400(200 MHz) */
-       [0] = {
-               .max_freq       = 200000000,
-               .min_freq       = 10000000,
-               .tRPab          = 21000,
-               .tRCD           = 18000,
-               .tWR            = 15000,
-               .tRAS_min       = 42000,
-               .tRRD           = 10000,
-               .tWTR           = 10000,
-               .tXP            = 7500,
-               .tRTP           = 7500,
-               .tCKESR         = 15000,
-               .tDQSCK_max     = 5500,
-               .tFAW           = 50000,
-               .tZQCS          = 90000,
-               .tZQCL          = 360000,
-               .tZQinit        = 1000000,
-               .tRAS_max_ns    = 70000,
-               .tDQSCK_max_derated = 6000,
-       },
-       /* Speed bin 533(266 MHz) */
-       [1] = {
-               .max_freq       = 266666666,
-               .min_freq       = 10000000,
-               .tRPab          = 21000,
-               .tRCD           = 18000,
-               .tWR            = 15000,
-               .tRAS_min       = 42000,
-               .tRRD           = 10000,
-               .tWTR           = 7500,
-               .tXP            = 7500,
-               .tRTP           = 7500,
-               .tCKESR         = 15000,
-               .tDQSCK_max     = 5500,
-               .tFAW           = 50000,
-               .tZQCS          = 90000,
-               .tZQCL          = 360000,
-               .tZQinit        = 1000000,
-               .tRAS_max_ns    = 70000,
-               .tDQSCK_max_derated = 6000,
-       },
-       /* Speed bin 800(400 MHz) */
-       [2] = {
-               .max_freq       = 400000000,
-               .min_freq       = 10000000,
-               .tRPab          = 21000,
-               .tRCD           = 18000,
-               .tWR            = 15000,
-               .tRAS_min       = 42000,
-               .tRRD           = 10000,
-               .tWTR           = 7500,
-               .tXP            = 7500,
-               .tRTP           = 7500,
-               .tCKESR         = 15000,
-               .tDQSCK_max     = 5500,
-               .tFAW           = 50000,
-               .tZQCS          = 90000,
-               .tZQCL          = 360000,
-               .tZQinit        = 1000000,
-               .tRAS_max_ns    = 70000,
-               .tDQSCK_max_derated = 6000,
-       },
-       /* Speed bin 1066(533 MHz) */
-       [3] = {
-               .max_freq       = 533333333,
-               .min_freq       = 10000000,
-               .tRPab          = 21000,
-               .tRCD           = 18000,
-               .tWR            = 15000,
-               .tRAS_min       = 42000,
-               .tRRD           = 10000,
-               .tWTR           = 7500,
-               .tXP            = 7500,
-               .tRTP           = 7500,
-               .tCKESR         = 15000,
-               .tDQSCK_max     = 5500,
-               .tFAW           = 50000,
-               .tZQCS          = 90000,
-               .tZQCL          = 360000,
-               .tZQinit        = 1000000,
-               .tRAS_max_ns    = 70000,
-               .tDQSCK_max_derated = 5620,
-       },
-};
-EXPORT_SYMBOL_GPL(lpddr2_jedec_timings);
-
-const struct lpddr2_min_tck lpddr2_jedec_min_tck = {
-       .tRPab          = 3,
-       .tRCD           = 3,
-       .tWR            = 3,
-       .tRASmin        = 3,
-       .tRRD           = 2,
-       .tWTR           = 2,
-       .tXP            = 2,
-       .tRTP           = 2,
-       .tCKE           = 3,
-       .tCKESR         = 3,
-       .tFAW           = 8
-};
-EXPORT_SYMBOL_GPL(lpddr2_jedec_min_tck);