phy: qcom-qmp-ufs: provide symbol clocks
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Wed, 23 Nov 2022 10:44:41 +0000 (12:44 +0200)
committerVinod Koul <vkoul@kernel.org>
Thu, 12 Jan 2023 17:16:19 +0000 (22:46 +0530)
Register three UFS symbol clocks (ufs_rx_symbol_0_clk_src,
ufs_rx_symbol_1_clk_src ufs_tx_symbol_0_clk_src). Register OF clock
provider to let other devices link these clocks through the DT.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20221123104443.3415267-3-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/qualcomm/phy-qcom-qmp-ufs.c

index 318eea35b9721969dbaa996b1b7c58c9234c1c15..7fc8262ee1fa0ea160d451b86752346bad04e2b8 100644 (file)
@@ -1021,6 +1021,59 @@ static int qmp_ufs_clk_init(struct qmp_ufs *qmp)
        return devm_clk_bulk_get(dev, num, qmp->clks);
 }
 
+static void qmp_ufs_clk_release_provider(void *res)
+{
+       of_clk_del_provider(res);
+}
+
+#define UFS_SYMBOL_CLOCKS 3
+
+static int qmp_ufs_register_clocks(struct qmp_ufs *qmp, struct device_node *np)
+{
+       struct clk_hw_onecell_data *clk_data;
+       struct clk_hw *hw;
+       char name[64];
+       int ret;
+
+       clk_data = devm_kzalloc(qmp->dev,
+                               struct_size(clk_data, hws, UFS_SYMBOL_CLOCKS),
+                               GFP_KERNEL);
+       if (!clk_data)
+               return -ENOMEM;
+
+       clk_data->num = UFS_SYMBOL_CLOCKS;
+
+       snprintf(name, sizeof(name), "%s::rx_symbol_0", dev_name(qmp->dev));
+       hw = devm_clk_hw_register_fixed_rate(qmp->dev, name, NULL, 0, 0);
+       if (IS_ERR(hw))
+               return PTR_ERR(hw);
+
+       clk_data->hws[0] = hw;
+
+       snprintf(name, sizeof(name), "%s::rx_symbol_1", dev_name(qmp->dev));
+       hw = devm_clk_hw_register_fixed_rate(qmp->dev, name, NULL, 0, 0);
+       if (IS_ERR(hw))
+               return PTR_ERR(hw);
+
+       clk_data->hws[1] = hw;
+
+       snprintf(name, sizeof(name), "%s::tx_symbol_0", dev_name(qmp->dev));
+       hw = devm_clk_hw_register_fixed_rate(qmp->dev, name, NULL, 0, 0);
+       if (IS_ERR(hw))
+               return PTR_ERR(hw);
+
+       clk_data->hws[2] = hw;
+
+       ret = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_data);
+       if (ret)
+               return ret;
+
+       /*
+        * Roll a devm action because the clock provider can be a child node.
+        */
+       return devm_add_action_or_reset(qmp->dev, qmp_ufs_clk_release_provider, np);
+}
+
 static int qmp_ufs_parse_dt_legacy(struct qmp_ufs *qmp, struct device_node *np)
 {
        struct platform_device *pdev = to_platform_device(qmp->dev);
@@ -1133,6 +1186,10 @@ static int qmp_ufs_probe(struct platform_device *pdev)
        if (ret)
                goto err_node_put;
 
+       ret = qmp_ufs_register_clocks(qmp, np);
+       if (ret)
+               goto err_node_put;
+
        qmp->phy = devm_phy_create(dev, np, &qcom_qmp_ufs_phy_ops);
        if (IS_ERR(qmp->phy)) {
                ret = PTR_ERR(qmp->phy);