arm64: dts: qcom: sm6350: Add I2C busses

Add nodes for the I2C busses on sm6350.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220408114205.234635-2-luca.weiss@fairphone.com

diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index ef43af39569c8eab69b265203a23259b9dad9018..81db25952cf1b4cf2223b25e46d35a94e9185df8 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -517,6 +517,45 @@
                        };
                };
 
+               qupv3_id_0: geniqup@8c0000 {
+                       compatible = "qcom,geni-se-qup";
+                       reg = <0x0 0x8c0000 0x0 0x2000>;
+                       clock-names = "m-ahb", "s-ahb";
+                       clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
+                                <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
+                       #address-cells = <2>;
+                       #size-cells = <2>;
+                       iommus = <&apps_smmu 0x43 0x0>;
+                       ranges;
+                       status = "disabled";
+
+                       i2c0: i2c@880000 {
+                               compatible = "qcom,geni-i2c";
+                               reg = <0 0x00880000 0 0x4000>;
+                               clock-names = "se";
+                               clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&qup_i2c0_default>;
+                               interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               status = "disabled";
+                       };
+
+                       i2c2: i2c@888000 {
+                               compatible = "qcom,geni-i2c";
+                               reg = <0 0x00888000 0 0x4000>;
+                               clock-names = "se";
+                               clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&qup_i2c2_default>;
+                               interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               status = "disabled";
+                       };
+               };
+
                qupv3_id_1: geniqup@9c0000 {
                        compatible = "qcom,geni-se-qup";
                        reg = <0x0 0x9c0000 0x0 0x2000>;
@@ -529,6 +568,45 @@
                        ranges;
                        status = "disabled";
 
+                       i2c6: i2c@980000 {
+                               compatible = "qcom,geni-i2c";
+                               reg = <0 0x00980000 0 0x4000>;
+                               clock-names = "se";
+                               clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&qup_i2c6_default>;
+                               interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               status = "disabled";
+                       };
+
+                       i2c7: i2c@984000 {
+                               compatible = "qcom,geni-i2c";
+                               reg = <0 0x00984000 0 0x4000>;
+                               clock-names = "se";
+                               clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&qup_i2c7_default>;
+                               interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               status = "disabled";
+                       };
+
+                       i2c8: i2c@988000 {
+                               compatible = "qcom,geni-i2c";
+                               reg = <0 0x00988000 0 0x4000>;
+                               clock-names = "se";
+                               clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&qup_i2c8_default>;
+                               interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               status = "disabled";
+                       };
+
                        uart9: serial@98c000 {
                                compatible = "qcom,geni-debug-uart";
                                reg = <0 0x98c000 0 0x4000>;
@@ -539,6 +617,20 @@
                                interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
                                status = "disabled";
                        };
+
+                       i2c10: i2c@990000 {
+                               compatible = "qcom,geni-i2c";
+                               reg = <0 0x00990000 0 0x4000>;
+                               clock-names = "se";
+                               clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>;
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&qup_i2c10_default>;
+                               interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               status = "disabled";
+                       };
+
                };
 
                tcsr_mutex: hwlock@1f40000 {
@@ -980,6 +1072,48 @@
                                drive-strength = <2>;
                                bias-disable;
                        };
+
+                       qup_i2c0_default: qup-i2c0-default {
+                               pins = "gpio0", "gpio1";
+                               function = "qup00";
+                               drive-strength = <2>;
+                               bias-pull-up;
+                       };
+
+                       qup_i2c2_default: qup-i2c2-default {
+                               pins = "gpio45", "gpio46";
+                               function = "qup02";
+                               drive-strength = <2>;
+                               bias-pull-up;
+                       };
+
+                       qup_i2c6_default: qup-i2c6-default {
+                               pins = "gpio13", "gpio14";
+                               function = "qup10";
+                               drive-strength = <2>;
+                               bias-pull-up;
+                       };
+
+                       qup_i2c7_default: qup-i2c7-default {
+                               pins = "gpio27", "gpio28";
+                               function = "qup11";
+                               drive-strength = <2>;
+                               bias-pull-up;
+                       };
+
+                       qup_i2c8_default: qup-i2c8-default {
+                               pins = "gpio19", "gpio20";
+                               function = "qup12";
+                               drive-strength = <2>;
+                               bias-pull-up;
+                       };
+
+                       qup_i2c10_default: qup-i2c10-default {
+                               pins = "gpio4", "gpio5";
+                               function = "qup14";
+                               drive-strength = <2>;
+                               bias-pull-up;
+                       };
                };
 
                apps_smmu: iommu@15000000 {