arm64: dts: imx8mp: Add GPT blocks
authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Mon, 27 Mar 2023 17:35:26 +0000 (19:35 +0200)
committerShawn Guo <shawnguo@kernel.org>
Thu, 6 Apr 2023 01:42:33 +0000 (09:42 +0800)
The i.MX8MP includes the same GPT blocks as the i.MX6DL. Add all 6
instances.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/imx8mp.dtsi

index 1b67571485160bc3b53f5002b168526fbf2bc34f..8b4a3397b417d04d047bcf9b732170579106b4ff 100644 (file)
                                status = "disabled";
                        };
 
+                       gpt1: timer@302d0000 {
+                               compatible = "fsl,imx8mp-gpt", "fsl,imx6dl-gpt";
+                               reg = <0x302d0000 0x10000>;
+                               interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clk IMX8MP_CLK_GPT1_ROOT>, <&clk IMX8MP_CLK_GPT1>;
+                               clock-names = "ipg", "per";
+                       };
+
+                       gpt2: timer@302e0000 {
+                               compatible = "fsl,imx8mp-gpt", "fsl,imx6dl-gpt";
+                               reg = <0x302e0000 0x10000>;
+                               interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clk IMX8MP_CLK_GPT2_ROOT>, <&clk IMX8MP_CLK_GPT2>;
+                               clock-names = "ipg", "per";
+                       };
+
+                       gpt3: timer@302f0000 {
+                               compatible = "fsl,imx8mp-gpt", "fsl,imx6dl-gpt";
+                               reg = <0x302f0000 0x10000>;
+                               interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clk IMX8MP_CLK_GPT3_ROOT>, <&clk IMX8MP_CLK_GPT3>;
+                               clock-names = "ipg", "per";
+                       };
+
                        iomuxc: pinctrl@30330000 {
                                compatible = "fsl,imx8mp-iomuxc";
                                reg = <0x30330000 0x10000>;
                                clocks = <&osc_24m>;
                                clock-names = "per";
                        };
+
+                       gpt6: timer@306e0000 {
+                               compatible = "fsl,imx8mp-gpt", "fsl,imx6dl-gpt";
+                               reg = <0x306e0000 0x10000>;
+                               interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clk IMX8MP_CLK_GPT6_ROOT>, <&clk IMX8MP_CLK_GPT6>;
+                               clock-names = "ipg", "per";
+                       };
+
+                       gpt5: timer@306f0000 {
+                               compatible = "fsl,imx8mp-gpt", "fsl,imx6dl-gpt";
+                               reg = <0x306f0000 0x10000>;
+                               interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clk IMX8MP_CLK_GPT5_ROOT>, <&clk IMX8MP_CLK_GPT5>;
+                               clock-names = "ipg", "per";
+                       };
+
+                       gpt4: timer@30700000 {
+                               compatible = "fsl,imx8mp-gpt", "fsl,imx6dl-gpt";
+                               reg = <0x30700000 0x10000>;
+                               interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clk IMX8MP_CLK_GPT4_ROOT>, <&clk IMX8MP_CLK_GPT4>;
+                               clock-names = "ipg", "per";
+                       };
                };
 
                aips3: bus@30800000 {