exec: [tcg] Track which vCPU is performing translation and execution

Information is tracked inside the TCGContext structure, and later used
by tracing events with the 'tcg' and 'vcpu' properties.

The 'cpu' field is used to check tracing of translation-time
events ("*_trans"). The 'tcg_env' field is used to pass it to
execution-time events ("*_exec").

Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-id: 146549350162.18437.3033661139638458143.stgit@fimbulvetr.bsc.es
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index f9b2426636207f35ce8dca9e5f821d52a65dab40..243567b8fc69d97d50381bf3e5dbbe842af85af0 100644 (file)
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -151,6 +151,7 @@ void alpha_translate_init(void)
     done_init = 1;
 
     cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+    tcg_ctx.tcg_env = cpu_env;
 
     for (i = 0; i < 31; i++) {
         cpu_std_ir[i] = tcg_global_mem_new_i64(cpu_env,

diff --git a/target-arm/translate.c b/target-arm/translate.c
index 3e7146769d548314f5d1f255396f870e069d44ab..bd5d5cb5768a455663d7bcdbf40a3c5602daac43 100644 (file)
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -85,6 +85,7 @@ void arm_translate_init(void)
     int i;
 
     cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+    tcg_ctx.tcg_env = cpu_env;
 
     for (i = 0; i < 16; i++) {
         cpu_R[i] = tcg_global_mem_new_i32(cpu_env,

diff --git a/target-cris/translate.c b/target-cris/translate.c
index cc515690e17920f3d8b23ebf6f93d9f59d6a9c11..f4a8d7d000fb270d23b039c0d040c900e38831fd 100644 (file)
--- a/target-cris/translate.c
+++ b/target-cris/translate.c
@@ -3374,6 +3374,7 @@ void cris_initialize_tcg(void)
     int i;
 
     cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+    tcg_ctx.tcg_env = cpu_env;
     cc_x = tcg_global_mem_new(cpu_env,
                               offsetof(CPUCRISState, cc_x), "cc_x");
     cc_src = tcg_global_mem_new(cpu_env,

diff --git a/target-cris/translate_v10.c b/target-cris/translate_v10.c
index 06ba1ef86a629650d1d64a8460c92349eea224ab..4707a18e775cdbafdbcd1b20c6a90e4e1aea9dc6 100644 (file)
--- a/target-cris/translate_v10.c
+++ b/target-cris/translate_v10.c
@@ -1250,6 +1250,7 @@ void cris_initialize_crisv10_tcg(void)
     int i;
 
     cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+    tcg_ctx.tcg_env = cpu_env;
     cc_x = tcg_global_mem_new(cpu_env,
                               offsetof(CPUCRISState, cc_x), "cc_x");
     cc_src = tcg_global_mem_new(cpu_env,

diff --git a/target-i386/translate.c b/target-i386/translate.c
index f010022fcd75b1ce05a2bed59938b6090d82e438..7dea18bd634512f31fa424ef2f074784700cf0b7 100644 (file)
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -8152,6 +8152,7 @@ void tcg_x86_init(void)
     initialized = true;
 
     cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+    tcg_ctx.tcg_env = cpu_env;
     cpu_cc_op = tcg_global_mem_new_i32(cpu_env,
                                        offsetof(CPUX86State, cc_op), "cc_op");
     cpu_cc_dst = tcg_global_mem_new(cpu_env, offsetof(CPUX86State, cc_dst),

diff --git a/target-lm32/translate.c b/target-lm32/translate.c
index 526b4374e69d16eff45f60ecaf4362a01dcbc0bc..2d8caebbfc9d5ac222c1198144cc0610e13b327f 100644 (file)
--- a/target-lm32/translate.c
+++ b/target-lm32/translate.c
@@ -1202,6 +1202,7 @@ void lm32_translate_init(void)
     int i;
 
     cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+    tcg_ctx.tcg_env = cpu_env;
 
     for (i = 0; i < ARRAY_SIZE(cpu_R); i++) {
         cpu_R[i] = tcg_global_mem_new(cpu_env,

diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 83db42a7d319311d81e68e3197909250a053baff..ecd5e5c8fd29bc62088fb7192f9982b4c00b6e8b 100644 (file)
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -78,6 +78,7 @@ void m68k_tcg_init(void)
     int i;
 
     cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+    tcg_ctx.tcg_env = cpu_env;
 
 #define DEFO32(name, offset) \
     QREG_##name = tcg_global_mem_new_i32(cpu_env, \

diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index c54304aca5e345039462373dcf696d701520cb67..80098ece15e67812628ae260931ade713db2a5be 100644 (file)
--- a/target-microblaze/translate.c
+++ b/target-microblaze/translate.c
@@ -1878,6 +1878,7 @@ void mb_tcg_init(void)
     int i;
 
     cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+    tcg_ctx.tcg_env = cpu_env;
 
     env_debug = tcg_global_mem_new(cpu_env,
                     offsetof(CPUMBState, debug),

diff --git a/target-mips/translate.c b/target-mips/translate.c
index f420680d1fc3f7c71a582f2c13a7585f34cfdb1a..aaa1d026831ad02f7a95a0439897119fefc3bcbd 100644 (file)
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -20005,6 +20005,7 @@ void mips_tcg_init(void)
         return;
 
     cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+    tcg_ctx.tcg_env = cpu_env;
 
     TCGV_UNUSED(cpu_gpr[0]);
     for (i = 1; i < 32; i++)

diff --git a/target-moxie/translate.c b/target-moxie/translate.c
index 58200c25d3f4656582a6d36d665da420a7e5f0ed..0660b44c08c964fd8563907e7016ca2b9be53d02 100644 (file)
--- a/target-moxie/translate.c
+++ b/target-moxie/translate.c
@@ -106,6 +106,7 @@ void moxie_translate_init(void)
         return;
     }
     cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+    tcg_ctx.tcg_env = cpu_env;
     cpu_pc = tcg_global_mem_new_i32(cpu_env,
                                     offsetof(CPUMoxieState, pc), "$pc");
     for (i = 0; i < 16; i++)

diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c
index c08876b14aeaec0a700c093d2c6c4c2eb896f196..28c944657c99b1bee44d2b6d99aee1276949bede 100644 (file)
--- a/target-openrisc/translate.c
+++ b/target-openrisc/translate.c
@@ -78,6 +78,7 @@ void openrisc_translate_init(void)
     int i;
 
     cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+    tcg_ctx.tcg_env = cpu_env;
     cpu_sr = tcg_global_mem_new(cpu_env,
                                 offsetof(CPUOpenRISCState, sr), "sr");
     env_flags = tcg_global_mem_new_i32(cpu_env,

diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 30dc76aafa8e80d46c158eae7e198cb66f8e04e4..df4e0a308bea023f9e4eb3bbfcb1bf67dea63ece 100644 (file)
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -88,6 +88,7 @@ void ppc_translate_init(void)
         return;
 
     cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+    tcg_ctx.tcg_env = cpu_env;
 
     p = cpu_reg_names;
     cpu_reg_names_size = sizeof(cpu_reg_names);

diff --git a/target-s390x/translate.c b/target-s390x/translate.c
index ce5db5dd46aa3848acc8151d861aafb7f483fde3..3c3487a5a96359c5ca08f1161a3e0750f34ffe57 100644 (file)
--- a/target-s390x/translate.c
+++ b/target-s390x/translate.c
@@ -169,6 +169,7 @@ void s390x_translate_init(void)
     int i;
 
     cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+    tcg_ctx.tcg_env = cpu_env;
     psw_addr = tcg_global_mem_new_i64(cpu_env,
                                       offsetof(CPUS390XState, psw.addr),
                                       "psw_addr");

diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index 7518eb550845a0920e023e544ab223c33598c3f5..ca80cf70ca84bf48ff669e13e80d4983626dac1c 100644 (file)
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -101,6 +101,7 @@ void sh4_translate_init(void)
         return;
 
     cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+    tcg_ctx.tcg_env = cpu_env;
 
     for (i = 0; i < 24; i++)
         cpu_gregs[i] = tcg_global_mem_new_i32(cpu_env,

diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index afd306fbab1cf1ecbb34ede4c384c63a63fce5fb..afd46b878f07431e89cd79c48d6450abd12a1dbf 100644 (file)
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -5404,6 +5404,7 @@ void gen_intermediate_code_init(CPUSPARCState *env)
     inited = 1;
 
     cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+    tcg_ctx.tcg_env = cpu_env;
 
     cpu_regwptr = tcg_global_mem_new_ptr(cpu_env,
                                          offsetof(CPUSPARCState, regwptr),

diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c
index bdea673e5b2b85c4c5f7c1ff02d2b792bbb22e94..11c97323898f98be10aa945ea6969830763713ce 100644 (file)
--- a/target-tilegx/translate.c
+++ b/target-tilegx/translate.c
@@ -2443,6 +2443,7 @@ void tilegx_tcg_init(void)
     int i;
 
     cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+    tcg_ctx.tcg_env = cpu_env;
     cpu_pc = tcg_global_mem_new_i64(cpu_env, offsetof(CPUTLGState, pc), "pc");
     for (i = 0; i < TILEGX_R_COUNT; i++) {
         cpu_regs[i] = tcg_global_mem_new_i64(cpu_env,

diff --git a/target-tricore/translate.c b/target-tricore/translate.c
index eb3deac88909a2f4c3ff14e28bcb03d65361178a..9a50df9a88fbc7ccb6e56408eab6a51e2a6ce372 100644 (file)
--- a/target-tricore/translate.c
+++ b/target-tricore/translate.c
@@ -8835,6 +8835,7 @@ void tricore_tcg_init(void)
         return;
     }
     cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+    tcg_ctx.tcg_env = cpu_env;
     /* reg init */
     for (i = 0 ; i < 16 ; i++) {
         cpu_gpr_a[i] = tcg_global_mem_new(cpu_env,

diff --git a/target-unicore32/translate.c b/target-unicore32/translate.c
index c4d45fa0f454fb59d90c96a9e78929945a8c4a9b..09354f92d24a01bbde16f6bb781330604d9f0a4e 100644 (file)
--- a/target-unicore32/translate.c
+++ b/target-unicore32/translate.c
@@ -70,6 +70,7 @@ void uc32_translate_init(void)
     int i;
 
     cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+    tcg_ctx.tcg_env = cpu_env;
 
     for (i = 0; i < 32; i++) {
         cpu_R[i] = tcg_global_mem_new_i32(cpu_env,

diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c
index 2a8e5c5d9420cdf19064f25803c94abcd0189fd1..4c1e48748b794f7de0aa2eb54f34aab747eb81b8 100644 (file)
--- a/target-xtensa/translate.c
+++ b/target-xtensa/translate.c
@@ -219,6 +219,7 @@ void xtensa_translate_init(void)
     int i;
 
     cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
+    tcg_ctx.tcg_env = cpu_env;
     cpu_pc = tcg_global_mem_new_i32(cpu_env,
             offsetof(CPUXtensaState, pc), "pc");
 

diff --git a/tcg/tcg.h b/tcg/tcg.h
index 909db3fc020adb0256ec4cbbda8dc24fc7101279..66d7fc01c53cb98f4c2f04cd77ed97068b66e92d 100644 (file)
--- a/tcg/tcg.h
+++ b/tcg/tcg.h
@@ -599,6 +599,10 @@ struct TCGContext {
 
     TBContext tb_ctx;
 
+    /* Track which vCPU triggers events */
+    CPUState *cpu;                      /* *_trans */
+    TCGv_env tcg_env;                   /* *_exec  */
+
     /* The TCGBackendData structure is private to tcg-target.inc.c.  */
     struct TCGBackendData *be;
 

diff --git a/translate-all.c b/translate-all.c
index 3f402dfe04f5da25e1a3beb8a83917481ee95ff8..eaa95e4cd7dc306deb21737e57ded872b523c4b6 100644 (file)
--- a/translate-all.c
+++ b/translate-all.c
@@ -1182,7 +1182,9 @@ TranslationBlock *tb_gen_code(CPUState *cpu,
 
     tcg_func_start(&tcg_ctx);
 
+    tcg_ctx.cpu = ENV_GET_CPU(env);
     gen_intermediate_code(env, tb);
+    tcg_ctx.cpu = NULL;
 
     trace_translate_block(tb, tb->pc, tb->tc_ptr);