arm64: dts: amlogic: axg: move cpu cooling-cells to common dtsi

The CPU cooling-cells property should be located in the meson-axg common
dtsi, as it is required for all AXG-based boards with DVFS.

Signed-off-by: Dmitry Rokosov <ddrokosov@salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Viacheslav Bocharov <adeep@lexina.in>
Link: https://lore.kernel.org/r/20240209212816.11187-2-ddrokosov@salutedevices.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>

diff --git a/arch/arm64/boot/dts/amlogic/meson-axg-jethome-jethub-j1xx.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg-jethome-jethub-j1xx.dtsi
index db605f3a22b4a990633de6e2528d9ed8b11134e3..55802fb03a46fe9425dabd613c89b81fb9301b66 100644 (file)
--- a/arch/arm64/boot/dts/amlogic/meson-axg-jethome-jethub-j1xx.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-axg-jethome-jethub-j1xx.dtsi
@@ -332,19 +332,3 @@
                "", "", "", "", "", // 80 - 84
                "", ""; // 85-86
 };
-
-&cpu0 {
-       #cooling-cells = <2>;
-};
-
-&cpu1 {
-       #cooling-cells = <2>;
-};
-
-&cpu2 {
-       #cooling-cells = <2>;
-};
-
-&cpu3 {
-       #cooling-cells = <2>;
-};

diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index 7e5ac9db93f8a7dae069fc91515b3f26d0f74b9d..ea96fef328e89ed64b79939a594550584e591976 100644 (file)
--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
@@ -74,6 +74,7 @@
                        enable-method = "psci";
                        next-level-cache = <&l2>;
                        clocks = <&scpi_dvfs 0>;
+                       #cooling-cells = <2>;
                };
 
                cpu1: cpu@1 {
@@ -83,6 +84,7 @@
                        enable-method = "psci";
                        next-level-cache = <&l2>;
                        clocks = <&scpi_dvfs 0>;
+                       #cooling-cells = <2>;
                };
 
                cpu2: cpu@2 {
@@ -92,6 +94,7 @@
                        enable-method = "psci";
                        next-level-cache = <&l2>;
                        clocks = <&scpi_dvfs 0>;
+                       #cooling-cells = <2>;
                };
 
                cpu3: cpu@3 {
@@ -101,6 +104,7 @@
                        enable-method = "psci";
                        next-level-cache = <&l2>;
                        clocks = <&scpi_dvfs 0>;
+                       #cooling-cells = <2>;
                };
 
                l2: l2-cache0 {