clk: imx: imx7ulp composite: Rename to show is clk_hw based

Renaming the imx7ulp_clk_composite register function to
imx7ulp_clk_hw_composite to show it is clk_hw based.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/drivers/clk/imx/clk-composite-7ulp.c b/drivers/clk/imx/clk-composite-7ulp.c
index 060f8600ea0dd3b244f41b5a8efe5b1a9a5b5607..b9efcc8a855d369fc561ca3925921f8bc168d546 100644 (file)
--- a/drivers/clk/imx/clk-composite-7ulp.c
+++ b/drivers/clk/imx/clk-composite-7ulp.c
@@ -21,7 +21,7 @@
 #define PCG_PCD_WIDTH  3
 #define PCG_PCD_MASK   0x7
 
-struct clk_hw *imx7ulp_clk_composite(const char *name,
+struct clk_hw *imx7ulp_clk_hw_composite(const char *name,
                                     const char * const *parent_names,
                                     int num_parents, bool mux_present,
                                     bool rate_present, bool gate_present,

diff --git a/drivers/clk/imx/clk-imx7ulp.c b/drivers/clk/imx/clk-imx7ulp.c
index 3d9673cb1270807a8f50e20c0fbd2c82be732a4a..cbff56191c1bf61f0e0fd32d5f80649e523bb005 100644 (file)
--- a/drivers/clk/imx/clk-imx7ulp.c
+++ b/drivers/clk/imx/clk-imx7ulp.c
@@ -165,23 +165,23 @@ static void __init imx7ulp_clk_pcc2_init(struct device_node *np)
        clks[IMX7ULP_CLK_RGPIO2P1]      = imx_clk_hw_gate("rgpio2p1", "nic1_bus_clk", base + 0x3c, 30);
        clks[IMX7ULP_CLK_DMA_MUX1]      = imx_clk_hw_gate("dma_mux1", "nic1_bus_clk", base + 0x84, 30);
        clks[IMX7ULP_CLK_CAAM]          = imx_clk_hw_gate("caam", "nic1_clk", base + 0x90, 30);
-       clks[IMX7ULP_CLK_LPTPM4]        = imx7ulp_clk_composite("lptpm4",  periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base + 0x94);
-       clks[IMX7ULP_CLK_LPTPM5]        = imx7ulp_clk_composite("lptpm5",  periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base + 0x98);
-       clks[IMX7ULP_CLK_LPIT1]         = imx7ulp_clk_composite("lpit1",   periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base + 0x9c);
-       clks[IMX7ULP_CLK_LPSPI2]        = imx7ulp_clk_composite("lpspi2",  periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base + 0xa4);
-       clks[IMX7ULP_CLK_LPSPI3]        = imx7ulp_clk_composite("lpspi3",  periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base + 0xa8);
-       clks[IMX7ULP_CLK_LPI2C4]        = imx7ulp_clk_composite("lpi2c4",  periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base + 0xac);
-       clks[IMX7ULP_CLK_LPI2C5]        = imx7ulp_clk_composite("lpi2c5",  periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base + 0xb0);
-       clks[IMX7ULP_CLK_LPUART4]       = imx7ulp_clk_composite("lpuart4", periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base + 0xb4);
-       clks[IMX7ULP_CLK_LPUART5]       = imx7ulp_clk_composite("lpuart5", periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base + 0xb8);
-       clks[IMX7ULP_CLK_FLEXIO1]       = imx7ulp_clk_composite("flexio1", periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base + 0xc4);
-       clks[IMX7ULP_CLK_USB0]          = imx7ulp_clk_composite("usb0",    periph_plat_sels, ARRAY_SIZE(periph_plat_sels), true, true,  true, base + 0xcc);
-       clks[IMX7ULP_CLK_USB1]          = imx7ulp_clk_composite("usb1",    periph_plat_sels, ARRAY_SIZE(periph_plat_sels), true, true,  true, base + 0xd0);
+       clks[IMX7ULP_CLK_LPTPM4]        = imx7ulp_clk_hw_composite("lptpm4",  periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base + 0x94);
+       clks[IMX7ULP_CLK_LPTPM5]        = imx7ulp_clk_hw_composite("lptpm5",  periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base + 0x98);
+       clks[IMX7ULP_CLK_LPIT1]         = imx7ulp_clk_hw_composite("lpit1",   periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base + 0x9c);
+       clks[IMX7ULP_CLK_LPSPI2]        = imx7ulp_clk_hw_composite("lpspi2",  periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base + 0xa4);
+       clks[IMX7ULP_CLK_LPSPI3]        = imx7ulp_clk_hw_composite("lpspi3",  periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base + 0xa8);
+       clks[IMX7ULP_CLK_LPI2C4]        = imx7ulp_clk_hw_composite("lpi2c4",  periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base + 0xac);
+       clks[IMX7ULP_CLK_LPI2C5]        = imx7ulp_clk_hw_composite("lpi2c5",  periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base + 0xb0);
+       clks[IMX7ULP_CLK_LPUART4]       = imx7ulp_clk_hw_composite("lpuart4", periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base + 0xb4);
+       clks[IMX7ULP_CLK_LPUART5]       = imx7ulp_clk_hw_composite("lpuart5", periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base + 0xb8);
+       clks[IMX7ULP_CLK_FLEXIO1]       = imx7ulp_clk_hw_composite("flexio1", periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base + 0xc4);
+       clks[IMX7ULP_CLK_USB0]          = imx7ulp_clk_hw_composite("usb0",    periph_plat_sels, ARRAY_SIZE(periph_plat_sels), true, true,  true, base + 0xcc);
+       clks[IMX7ULP_CLK_USB1]          = imx7ulp_clk_hw_composite("usb1",    periph_plat_sels, ARRAY_SIZE(periph_plat_sels), true, true,  true, base + 0xd0);
        clks[IMX7ULP_CLK_USB_PHY]       = imx_clk_hw_gate("usb_phy", "nic1_bus_clk", base + 0xd4, 30);
-       clks[IMX7ULP_CLK_USDHC0]        = imx7ulp_clk_composite("usdhc0",  periph_plat_sels, ARRAY_SIZE(periph_plat_sels), true, true,  true, base + 0xdc);
-       clks[IMX7ULP_CLK_USDHC1]        = imx7ulp_clk_composite("usdhc1",  periph_plat_sels, ARRAY_SIZE(periph_plat_sels), true, true,  true, base + 0xe0);
-       clks[IMX7ULP_CLK_WDG1]          = imx7ulp_clk_composite("wdg1",    periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, true,  true, base + 0xf4);
-       clks[IMX7ULP_CLK_WDG2]          = imx7ulp_clk_composite("wdg2",    periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, true,  true, base + 0x10c);
+       clks[IMX7ULP_CLK_USDHC0]        = imx7ulp_clk_hw_composite("usdhc0",  periph_plat_sels, ARRAY_SIZE(periph_plat_sels), true, true,  true, base + 0xdc);
+       clks[IMX7ULP_CLK_USDHC1]        = imx7ulp_clk_hw_composite("usdhc1",  periph_plat_sels, ARRAY_SIZE(periph_plat_sels), true, true,  true, base + 0xe0);
+       clks[IMX7ULP_CLK_WDG1]          = imx7ulp_clk_hw_composite("wdg1",    periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, true,  true, base + 0xf4);
+       clks[IMX7ULP_CLK_WDG2]          = imx7ulp_clk_hw_composite("wdg2",    periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, true,  true, base + 0x10c);
 
        imx_check_clk_hws(clks, clk_data->num);
 
@@ -216,17 +216,17 @@ static void __init imx7ulp_clk_pcc3_init(struct device_node *np)
        base = of_iomap(np, 0);
        WARN_ON(!base);
 
-       clks[IMX7ULP_CLK_LPTPM6]        = imx7ulp_clk_composite("lptpm6",  periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base + 0x84);
-       clks[IMX7ULP_CLK_LPTPM7]        = imx7ulp_clk_composite("lptpm7",  periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base + 0x88);
+       clks[IMX7ULP_CLK_LPTPM6]        = imx7ulp_clk_hw_composite("lptpm6",  periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base + 0x84);
+       clks[IMX7ULP_CLK_LPTPM7]        = imx7ulp_clk_hw_composite("lptpm7",  periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base + 0x88);
 
        clks[IMX7ULP_CLK_MMDC]          = clk_hw_register_gate(NULL, "mmdc", "nic1_clk", CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
                                                               base + 0xac, 30, 0, &imx_ccm_lock);
-       clks[IMX7ULP_CLK_LPI2C6]        = imx7ulp_clk_composite("lpi2c6",  periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base + 0x90);
-       clks[IMX7ULP_CLK_LPI2C7]        = imx7ulp_clk_composite("lpi2c7",  periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base + 0x94);
-       clks[IMX7ULP_CLK_LPUART6]       = imx7ulp_clk_composite("lpuart6", periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base + 0x98);
-       clks[IMX7ULP_CLK_LPUART7]       = imx7ulp_clk_composite("lpuart7", periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base + 0x9c);
-       clks[IMX7ULP_CLK_DSI]           = imx7ulp_clk_composite("dsi",     periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, true,  true, base + 0xa4);
-       clks[IMX7ULP_CLK_LCDIF]         = imx7ulp_clk_composite("lcdif",   periph_plat_sels, ARRAY_SIZE(periph_plat_sels), true, true,  true, base + 0xa8);
+       clks[IMX7ULP_CLK_LPI2C6]        = imx7ulp_clk_hw_composite("lpi2c6",  periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base + 0x90);
+       clks[IMX7ULP_CLK_LPI2C7]        = imx7ulp_clk_hw_composite("lpi2c7",  periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base + 0x94);
+       clks[IMX7ULP_CLK_LPUART6]       = imx7ulp_clk_hw_composite("lpuart6", periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base + 0x98);
+       clks[IMX7ULP_CLK_LPUART7]       = imx7ulp_clk_hw_composite("lpuart7", periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, false, true, base + 0x9c);
+       clks[IMX7ULP_CLK_DSI]           = imx7ulp_clk_hw_composite("dsi",     periph_bus_sels, ARRAY_SIZE(periph_bus_sels), true, true,  true, base + 0xa4);
+       clks[IMX7ULP_CLK_LCDIF]         = imx7ulp_clk_hw_composite("lcdif",   periph_plat_sels, ARRAY_SIZE(periph_plat_sels), true, true,  true, base + 0xa8);
 
        clks[IMX7ULP_CLK_VIU]           = imx_clk_hw_gate("viu",   "nic1_clk",     base + 0xa0, 30);
        clks[IMX7ULP_CLK_PCTLC]         = imx_clk_hw_gate("pctlc", "nic1_bus_clk", base + 0xb8, 30);
@@ -234,8 +234,8 @@ static void __init imx7ulp_clk_pcc3_init(struct device_node *np)
        clks[IMX7ULP_CLK_PCTLE]         = imx_clk_hw_gate("pctle", "nic1_bus_clk", base + 0xc0, 30);
        clks[IMX7ULP_CLK_PCTLF]         = imx_clk_hw_gate("pctlf", "nic1_bus_clk", base + 0xc4, 30);
 
-       clks[IMX7ULP_CLK_GPU3D]         = imx7ulp_clk_composite("gpu3d",   periph_plat_sels, ARRAY_SIZE(periph_plat_sels), true, false, true, base + 0x140);
-       clks[IMX7ULP_CLK_GPU2D]         = imx7ulp_clk_composite("gpu2d",   periph_plat_sels, ARRAY_SIZE(periph_plat_sels), true, false, true, base + 0x144);
+       clks[IMX7ULP_CLK_GPU3D]         = imx7ulp_clk_hw_composite("gpu3d",   periph_plat_sels, ARRAY_SIZE(periph_plat_sels), true, false, true, base + 0x140);
+       clks[IMX7ULP_CLK_GPU2D]         = imx7ulp_clk_hw_composite("gpu2d",   periph_plat_sels, ARRAY_SIZE(periph_plat_sels), true, false, true, base + 0x144);
 
        imx_check_clk_hws(clks, clk_data->num);
 

diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h
index 6cd89754149bd59a0cae27e7f436f817fc724752..8ffdacaa323827b30b739fe7fee5633748a5e34e 100644 (file)
--- a/drivers/clk/imx/clk.h
+++ b/drivers/clk/imx/clk.h
@@ -203,7 +203,7 @@ struct clk_hw *imx_clk_hw_busy_mux(const char *name, void __iomem *reg, u8 shift
                             u8 width, void __iomem *busy_reg, u8 busy_shift,
                             const char * const *parent_names, int num_parents);
 
-struct clk_hw *imx7ulp_clk_composite(const char *name,
+struct clk_hw *imx7ulp_clk_hw_composite(const char *name,
                                     const char * const *parent_names,
                                     int num_parents, bool mux_present,
                                     bool rate_present, bool gate_present,