"", "_LOW", "_HIGH"
 };
 
+enum svs_fusemap_dev {
+       BDEV_BDES,
+       BDEV_MDES,
+       BDEV_MTDES,
+       BDEV_DCBDET,
+       BDEV_DCMDET,
+       BDEV_MAX
+};
+
+enum svs_fusemap_glb {
+       GLB_FT_PGM,
+       GLB_VMIN,
+       GLB_MAX
+};
+
+struct svs_fusemap {
+       s8 index;
+       u8 ofst;
+};
+
 /**
  * struct svs_platform - svs platform control
  * @base: svs platform register base
        struct svs_bank *banks;
        bool (*efuse_parsing)(struct svs_platform *svsp);
        int (*probe)(struct svs_platform *svsp);
+       const struct svs_fusemap *glb_fuse_map;
        const u32 *regs;
        u32 bank_max;
 };
 
 /**
  * struct svs_bank - svs bank representation
+ * @dev_fuse_map: Bank fuse map data
  * @dev: bank device
  * @opp_dev: device for opp table/buck control
  * @init_completion: the timeout completion for bank init
  * opp_volt[i] = (volt[i] * volt_step) + volt_base;
  */
 struct svs_bank {
+       const struct svs_fusemap *dev_fuse_map;
        struct device *dev;
        struct device *opp_dev;
        struct completion init_completion;
                .core_sel               = 0x0fff0100,
                .int_st                 = BIT(0),
                .ctl0                   = 0x00540003,
+               .dev_fuse_map           = (const struct svs_fusemap[BDEV_MAX]) {
+                       { 10, 16 }, { 10, 24 }, { 10, 0 }, { 8, 0 }, { 8, 8 }
+               }
        },
        {
                .sw_id                  = SVSB_SWID_GPU,
                .tzone_htemp_voffset    = 0,
                .tzone_ltemp            = 25000,
                .tzone_ltemp_voffset    = 7,
+               .dev_fuse_map           = (const struct svs_fusemap[BDEV_MAX]) {
+                       { 9, 16 }, { 9, 24 }, { 9, 0 }, { 8, 0 }, { 8, 8 }
+               },
        },
 };
 
                .tzone_htemp_voffset    = 0,
                .tzone_ltemp            = 25000,
                .tzone_ltemp_voffset    = 7,
+               .dev_fuse_map           = (const struct svs_fusemap[BDEV_MAX]) {
+                       { 10, 16 }, { 10, 24 }, { 10, 0 }, { 17, 0 }, { 17, 8 }
+               }
        },
        {
                .sw_id                  = SVSB_SWID_GPU,
                .tzone_htemp_voffset    = 0,
                .tzone_ltemp            = 25000,
                .tzone_ltemp_voffset    = 7,
+               .dev_fuse_map           = (const struct svs_fusemap[BDEV_MAX]) {
+                       { 9, 16 }, { 9, 24 }, { 17, 0 }, { 17, 16 }, { 17, 24 }
+               }
        },
 };
 
                .core_sel               = 0x0fff0000,
                .int_st                 = BIT(0),
                .ctl0                   = 0x00100003,
+               .dev_fuse_map           = (const struct svs_fusemap[BDEV_MAX]) {
+                       { 5, 16 }, { 5, 24 }, { 5, 0 }, { 15, 16 }, { 15, 24 }
+               }
        },
        {
                .sw_id                  = SVSB_SWID_GPU,
                .tzone_htemp_voffset    = 0,
                .tzone_ltemp            = 25000,
                .tzone_ltemp_voffset    = 7,
+               .dev_fuse_map           = (const struct svs_fusemap[BDEV_MAX]) {
+                       { 4, 16 }, { 4, 24 }, { 4, 0 }, { 14, 0 }, { 14, 8 }
+               }
        },
 };
 
                .core_sel               = 0x0fff0100,
                .int_st                 = BIT(0),
                .ctl0                   = 0x00540003,
+               .dev_fuse_map           = (const struct svs_fusemap[BDEV_MAX]) {
+                       { 3, 16 }, { 3, 24 }, { 3, 0 }, { 14, 16 }, { 14, 24 }
+               }
        },
        {
                .sw_id                  = SVSB_SWID_CPU_BIG,
                .tzone_htemp_voffset    = 8,
                .tzone_ltemp            = 25000,
                .tzone_ltemp_voffset    = 8,
+               .dev_fuse_map           = (const struct svs_fusemap[BDEV_MAX]) {
+                       { 2, 16 }, { 2, 24 }, { 2, 0 }, { 13, 0 }, { 13, 8 }
+               }
        },
        {
                .sw_id                  = SVSB_SWID_CPU_LITTLE,
                .tzone_htemp_voffset    = 8,
                .tzone_ltemp            = 25000,
                .tzone_ltemp_voffset    = 8,
+               .dev_fuse_map           = (const struct svs_fusemap[BDEV_MAX]) {
+                       { 4, 16 }, { 4, 24 }, { 4, 0 }, { 14, 0 }, { 14, 8 }
+               }
        },
        {
                .sw_id                  = SVSB_SWID_CCI,
                .tzone_htemp_voffset    = 8,
                .tzone_ltemp            = 25000,
                .tzone_ltemp_voffset    = 8,
+               .dev_fuse_map           = (const struct svs_fusemap[BDEV_MAX]) {
+                       { 5, 16 }, { 5, 24 }, { 5, 0 }, { 15, 16 }, { 15, 24 }
+               }
        },
        {
                .sw_id                  = SVSB_SWID_GPU,
                .tzone_htemp_voffset    = 8,
                .tzone_ltemp            = 25000,
                .tzone_ltemp_voffset    = 7,
+               .dev_fuse_map           = (const struct svs_fusemap[BDEV_MAX]) {
+                       { 6, 16 }, { 6, 24 }, { 6, 0 }, { 15, 8 }, { 15, 0 }
+               }
        },
 };
 
                .core_sel               = 0x8fff0000,
                .int_st                 = BIT(0),
                .ctl0                   = 0x00010001,
+               .dev_fuse_map           = (const struct svs_fusemap[BDEV_MAX]) {
+                       { 16, 0 }, { 16, 8 }, { 17, 16 }, { 16, 16 }, { 16, 24 }
+               }
        },
        {
                .sw_id                  = SVSB_SWID_CPU_BIG,
                .core_sel               = 0x8fff0001,
                .int_st                 = BIT(1),
                .ctl0                   = 0x00000001,
+               .dev_fuse_map           = (const struct svs_fusemap[BDEV_MAX]) {
+                       { 18, 0 }, { 18, 8 }, { 17, 0 }, { 18, 16 }, { 18, 24 }
+               }
        },
        {
                .sw_id                  = SVSB_SWID_CCI,
                .core_sel               = 0x8fff0002,
                .int_st                 = BIT(2),
                .ctl0                   = 0x00100003,
+               .dev_fuse_map           = (const struct svs_fusemap[BDEV_MAX]) {
+                       { 4, 0 }, { 4, 8 }, { 5, 16 }, { 4, 16 }, { 4, 24 }
+               }
        },
        {
                .sw_id                  = SVSB_SWID_GPU,
                .tzone_htemp_voffset    = 0,
                .tzone_ltemp            = 25000,
                .tzone_ltemp_voffset    = 3,
+               .dev_fuse_map           = (const struct svs_fusemap[BDEV_MAX]) {
+                       { 6, 0 }, { 6, 8 }, { 5, 0 }, { 6, 16 }, { 6, 24 }
+               }
        },
 };
 
        .probe = svs_mt8192_platform_probe,
        .regs = svs_regs_v2,
        .bank_max = ARRAY_SIZE(svs_mt8195_banks),
+       .glb_fuse_map = (const struct svs_fusemap[GLB_MAX]) {
+               { 0, 0 }, { 19, 4 }
+       }
 };
 
 static const struct svs_platform_data svs_mt8192_platform_data = {
        .probe = svs_mt8192_platform_probe,
        .regs = svs_regs_v2,
        .bank_max = ARRAY_SIZE(svs_mt8192_banks),
+       .glb_fuse_map = (const struct svs_fusemap[GLB_MAX]) {
+               /* FT_PGM not present */
+               { -1, 0 }, { 19, 4 }
+       }
 };
 
 static const struct svs_platform_data svs_mt8188_platform_data = {
        .probe = svs_mt8192_platform_probe,
        .regs = svs_regs_v2,
        .bank_max = ARRAY_SIZE(svs_mt8188_banks),
+       .glb_fuse_map = (const struct svs_fusemap[GLB_MAX]) {
+               /* FT_PGM and VMIN not present */
+               { -1, 0 }, { -1, 0 }
+       }
 };
 
 static const struct svs_platform_data svs_mt8186_platform_data = {
        .probe = svs_mt8186_platform_probe,
        .regs = svs_regs_v2,
        .bank_max = ARRAY_SIZE(svs_mt8186_banks),
+       .glb_fuse_map = (const struct svs_fusemap[GLB_MAX]) {
+               /* FT_PGM and VMIN not present */
+               { -1, 0 }, { -1, 0 }
+       }
 };
 
 static const struct svs_platform_data svs_mt8183_platform_data = {
        .probe = svs_mt8183_platform_probe,
        .regs = svs_regs_v2,
        .bank_max = ARRAY_SIZE(svs_mt8183_banks),
+       .glb_fuse_map = (const struct svs_fusemap[GLB_MAX]) {
+               /* VMIN not present */
+               { 0, 4 }, { -1, 0 }
+       }
 };
 
 static const struct of_device_id svs_of_match[] = {