arm64: dts: exynos: gs101: enable cmu-peric1 clock controller

Enable the cmu-peric1 clock controller. It feeds additional USI, I3C
and PWM interfaces / busses.

Note that &sysreg_peric1 needs a clock to be able to access its
registers and now that Linux knows about this clock, we need to add it
in this commit as well so as to keep &sysreg_peric1 working, so that
the clock can be enabled as and when needed.

Signed-off-by: André Draszik <andre.draszik@linaro.org>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Link: https://lore.kernel.org/r/20240201161258.1013664-6-andre.draszik@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
index 1dc6b08be1bfaab9dc8fa11606a1c78fe7a92b2f..f89e25777e4a5e1ffc98a506cc8850d490dc64e2 100644 (file)
--- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
@@ -429,9 +429,20 @@
                        };
                };
 
+               cmu_peric1: clock-controller@10c00000 {
+                       compatible = "google,gs101-cmu-peric1";
+                       reg = <0x10c00000 0x4000>;
+                       #clock-cells = <1>;
+                       clocks = <&ext_24_5m>,
+                                <&cmu_top CLK_DOUT_CMU_PERIC1_BUS>,
+                                <&cmu_top CLK_DOUT_CMU_PERIC1_IP>;
+                       clock-names = "oscclk", "bus", "ip";
+               };
+
                sysreg_peric1: syscon@10c20000 {
                        compatible = "google,gs101-peric1-sysreg", "syscon";
                        reg = <0x10c20000 0x10000>;
+                       clocks = <&cmu_peric1 CLK_GOUT_PERIC1_SYSREG_PERIC1_PCLK>;
                };
 
                pinctrl_peric1: pinctrl@10c40000 {