hw/dma: Constify all Property
authorRichard Henderson <richard.henderson@linaro.org>
Fri, 13 Dec 2024 15:33:04 +0000 (15:33 +0000)
committerRichard Henderson <richard.henderson@linaro.org>
Sun, 15 Dec 2024 18:54:54 +0000 (12:54 -0600)
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
hw/dma/i82374.c
hw/dma/i8257.c
hw/dma/pl080.c
hw/dma/pl330.c
hw/dma/xilinx_axidma.c
hw/dma/xlnx-zdma.c
hw/dma/xlnx_csu_dma.c

index e72aa2e1cef1795f3ffe7d6b2eaa560e5004d8e5..032afedde202279b4614e611218a3b950ee2bf46 100644 (file)
@@ -139,7 +139,7 @@ static void i82374_realize(DeviceState *dev, Error **errp)
     memset(s->commands, 0, sizeof(s->commands));
 }
 
-static Property i82374_properties[] = {
+static const Property i82374_properties[] = {
     DEFINE_PROP_UINT32("iobase", I82374State, iobase, 0x400),
     DEFINE_PROP_END_OF_LIST()
 };
index 3e6700e53b000d636148e1da93306febf58ff408..8b04177393034e909f59dc880626cef6c71579b0 100644 (file)
@@ -585,7 +585,7 @@ static void i8257_realize(DeviceState *dev, Error **errp)
     d->dma_bh = qemu_bh_new(i8257_dma_run, d);
 }
 
-static Property i8257_properties[] = {
+static const Property i8257_properties[] = {
     DEFINE_PROP_INT32("base", I8257State, base, 0x00),
     DEFINE_PROP_INT32("page-base", I8257State, page_base, 0x80),
     DEFINE_PROP_INT32("pageh-base", I8257State, pageh_base, 0x480),
index 8e76f88a693c758c12e3af6d8c6cc4682084da9c..3f392822ed0f22e73e2c9ba67c66720810cdc61f 100644 (file)
@@ -408,7 +408,7 @@ static void pl081_init(Object *obj)
     s->nchannels = 2;
 }
 
-static Property pl080_properties[] = {
+static const Property pl080_properties[] = {
     DEFINE_PROP_LINK("downstream", PL080State, downstream,
                      TYPE_MEMORY_REGION, MemoryRegion *),
     DEFINE_PROP_END_OF_LIST(),
index 0668caed7c2884660ef51dc3a5e6ca31816e27f0..d5a0a1caa20e59b9b4a65c01c7036b149c37f66f 100644 (file)
@@ -1646,7 +1646,7 @@ static void pl330_realize(DeviceState *dev, Error **errp)
     pl330_fifo_init(&s->fifo, s->data_width / 4 * s->data_buffer_dep);
 }
 
-static Property pl330_properties[] = {
+static const Property pl330_properties[] = {
     /* CR0 */
     DEFINE_PROP_UINT32("num_chnls", PL330State, num_chnls, 8),
     DEFINE_PROP_UINT8("num_periph_req", PL330State, num_periph_req, 4),
index 73a480bfbf84f3ba34ed239c9cdec3bfe7dd31c2..f09452d0b5237dacb527564c5d861e836a767bfc 100644 (file)
@@ -611,7 +611,7 @@ static void xilinx_axidma_init(Object *obj)
     sysbus_init_mmio(sbd, &s->iomem);
 }
 
-static Property axidma_properties[] = {
+static const Property axidma_properties[] = {
     DEFINE_PROP_UINT32("freqhz", XilinxAXIDMA, freqhz, 50000000),
     DEFINE_PROP_LINK("axistream-connected", XilinxAXIDMA,
                      tx_data_dev, TYPE_STREAM_SINK, StreamSink *),
index 46f50631ff2ac23ffef5892a47db10adfc943e78..1a63d5f3b28809cb1f74ac0d133e5c2ec48881d9 100644 (file)
@@ -810,7 +810,7 @@ static const VMStateDescription vmstate_zdma = {
     }
 };
 
-static Property zdma_props[] = {
+static const Property zdma_props[] = {
     DEFINE_PROP_UINT32("bus-width", XlnxZDMA, cfg.bus_width, 64),
     DEFINE_PROP_LINK("dma", XlnxZDMA, dma_mr,
                      TYPE_MEMORY_REGION, MemoryRegion *),
index 43738c435039b0f202da3f0b41a0797ed5078019..d78dc6444bdb94de3fd1f582c713c1fcf5edb4fd 100644 (file)
@@ -691,7 +691,7 @@ static const VMStateDescription vmstate_xlnx_csu_dma = {
     }
 };
 
-static Property xlnx_csu_dma_properties[] = {
+static const Property xlnx_csu_dma_properties[] = {
     /*
      * Ref PG021, Stream Data Width:
      * Data width in bits of the AXI S2MM AXI4-Stream Data bus.