devpriv->ai_ao_select_reg |= bit_values & bit_mask;
                ni_writeb(dev, devpriv->ai_ao_select_reg, reg);
                break;
-       case G0_G1_Select:
+       case NI_E_DMA_G0_G1_SEL_REG:
                devpriv->g0_g1_select_reg &= ~bit_mask;
                devpriv->g0_g1_select_reg |= bit_values & bit_mask;
                ni_writeb(dev, devpriv->g0_g1_select_reg, reg);
                        NI_E_DMA_AO_SEL_MASK, NI_E_DMA_AO_SEL(bits));
 }
 
-/* negative mite_channel means no channel */
+/* negative channel means no channel */
 static inline void ni_set_gpct_dma_channel(struct comedi_device *dev,
                                           unsigned gpct_index,
-                                          int mite_channel)
+                                          int channel)
 {
-       unsigned bitfield;
+       unsigned bits = 0;
 
-       if (mite_channel >= 0)
-               bitfield = GPCT_DMA_Select_Bits(gpct_index, mite_channel);
-       else
-               bitfield = 0;
-       ni_set_bitfield(dev, G0_G1_Select, GPCT_DMA_Select_Mask(gpct_index),
-                       bitfield);
+       if (channel >= 0)
+               bits = ni_stc_dma_channel_select_bitfield(channel);
+
+       ni_set_bitfield(dev, NI_E_DMA_G0_G1_SEL_REG,
+                       NI_E_DMA_G0_G1_SEL_MASK(gpct_index),
+                       NI_E_DMA_G0_G1_SEL(gpct_index, bits));
 }
 
 /* negative mite_channel means no channel */
 
        /* DMA setup */
        ni_writeb(dev, devpriv->ai_ao_select_reg, NI_E_DMA_AI_AO_SEL_REG);
-       ni_writeb(dev, devpriv->g0_g1_select_reg, G0_G1_Select);
+       ni_writeb(dev, devpriv->g0_g1_select_reg, NI_E_DMA_G0_G1_SEL_REG);
 
        if (devpriv->is_6xxx) {
                ni_writeb(dev, 0, Magic_611x);
 
 #define NI_E_DMA_AO_SEL(x)             (((x) & 0xf) << 4)
 #define NI_E_DMA_AO_SEL_MASK           NI_E_DMA_AO_SEL(0xf)
 
+#define NI_E_DMA_G0_G1_SEL_REG         0x0b    /* w8 */
+#define NI_E_DMA_G0_G1_SEL(_g, _c)     (((_c) & 0xf) << ((_g) * 4))
+#define NI_E_DMA_G0_G1_SEL_MASK(_g)    NI_E_DMA_G0_G1_SEL((_g), 0xf)
+
 #define NI_E_SERIAL_CMD_REG            0x0d    /* w8 */
 #define NI_E_SERIAL_CMD_DAC_LD(x)      BIT(3 + (x))
 #define NI_E_SERIAL_CMD_EEPROM_CS      BIT(2)
 #define NI_E_MISC_CMD_EXT_ATRIG                NI_E_MISC_CMD_INTEXT_ATRIG(0)
 #define NI_E_MISC_CMD_INT_ATRIG                NI_E_MISC_CMD_INTEXT_ATRIG(1)
 
-#define G0_G1_Select                   0x0b
 static inline unsigned ni_stc_dma_channel_select_bitfield(unsigned channel)
 {
        if (channel < 4)
        return 0;
 }
 
-static inline unsigned GPCT_DMA_Select_Bits(unsigned gpct_index,
-                                           unsigned mite_channel)
-{
-       return ni_stc_dma_channel_select_bitfield(mite_channel) << (4 *
-                                                                   gpct_index);
-}
-
-static inline unsigned GPCT_DMA_Select_Mask(unsigned gpct_index)
-{
-       return 0xf << (4 * gpct_index);
-}
-
 #define NI_E_AI_CFG_LO_REG             0x10    /* w16 */
 #define NI_E_AI_CFG_LO_LAST_CHAN       BIT(15)
 #define NI_E_AI_CFG_LO_GEN_TRIG                BIT(12)