arm64: dts: mt8195: Add adsp node and adsp mailbox nodes

Add adsp node and adsp mailbox nodes for mt8195.

Signed-off-by: YC Hung <yc.hung@mediatek.corp-partner.google.com>
Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.corp-partner.google.com>
Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220811025813.21492-17-tinghan.shen@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index bbea0acff3d2f19ab484ae2666763f514d2522dc..f42d33414125fff89e6a600e390f6afdc26e82c3 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -739,6 +739,43 @@
                        #clock-cells = <1>;
                };
 
+               adsp: dsp@10803000 {
+                       compatible = "mediatek,mt8195-dsp";
+                       reg = <0 0x10803000 0 0x1000>,
+                             <0 0x10840000 0 0x40000>;
+                       reg-names = "cfg", "sram";
+                       clocks = <&topckgen CLK_TOP_ADSP>,
+                                <&clk26m>,
+                                <&topckgen CLK_TOP_AUDIO_LOCAL_BUS>,
+                                <&topckgen CLK_TOP_MAINPLL_D7_D2>,
+                                <&scp_adsp CLK_SCP_ADSP_AUDIODSP>,
+                                <&topckgen CLK_TOP_AUDIO_H>;
+                       clock-names = "adsp_sel",
+                                "clk26m_ck",
+                                "audio_local_bus",
+                                "mainpll_d7_d2",
+                                "scp_adsp_audiodsp",
+                                "audio_h";
+                       power-domains = <&spm MT8195_POWER_DOMAIN_ADSP>;
+                       mbox-names = "rx", "tx";
+                       mboxes = <&adsp_mailbox0>, <&adsp_mailbox1>;
+                       status = "disabled";
+               };
+
+               adsp_mailbox0: mailbox@10816000 {
+                       compatible = "mediatek,mt8195-adsp-mbox";
+                       #mbox-cells = <0>;
+                       reg = <0 0x10816000 0 0x1000>;
+                       interrupts = <GIC_SPI 702 IRQ_TYPE_LEVEL_HIGH 0>;
+               };
+
+               adsp_mailbox1: mailbox@10817000 {
+                       compatible = "mediatek,mt8195-adsp-mbox";
+                       #mbox-cells = <0>;
+                       reg = <0 0x10817000 0 0x1000>;
+                       interrupts = <GIC_SPI 703 IRQ_TYPE_LEVEL_HIGH 0>;
+               };
+
                afe: mt8195-afe-pcm@10890000 {
                        compatible = "mediatek,mt8195-audio";
                        reg = <0 0x10890000 0 0x10000>;