ARM: dts: socfpga: Change Mercury+ AA1 dts to dtsi
authorPaweł Anikiel <pan@semihalf.com>
Fri, 3 Jun 2022 09:23:50 +0000 (11:23 +0200)
committerDinh Nguyen <dinguyen@kernel.org>
Tue, 14 Jun 2022 15:44:29 +0000 (10:44 -0500)
The Mercury+ AA1 is not a standalone board, rather it's a module
with an Arria 10 SoC. Remove status = "okay" and i2c aliases, as they
are routed to the base board and should be enabled from there.

Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
arch/arm/boot/dts/Makefile
arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts [deleted file]
arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dtsi [new file with mode: 0644]

index 184899808ee73795a6081e31370a4eb6c3d829cb..b0dccad58a1d7b80d236e7596812fe9d9ced79c1 100644 (file)
@@ -1148,7 +1148,6 @@ dtb-$(CONFIG_ARCH_S5PV210) += \
        s5pv210-torbreck.dtb
 dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += \
        socfpga_arria5_socdk.dtb \
-       socfpga_arria10_mercury_aa1.dtb \
        socfpga_arria10_socdk_nand.dtb \
        socfpga_arria10_socdk_qspi.dtb \
        socfpga_arria10_socdk_sdmmc.dtb \
diff --git a/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts b/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dts
deleted file mode 100644 (file)
index a75c059..0000000
+++ /dev/null
@@ -1,112 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/dts-v1/;
-
-#include "socfpga_arria10.dtsi"
-
-/ {
-
-       model = "Enclustra Mercury AA1";
-       compatible = "enclustra,mercury-aa1", "altr,socfpga-arria10", "altr,socfpga";
-
-       aliases {
-               ethernet0 = &gmac0;
-               serial1 = &uart1;
-               i2c0 = &i2c0;
-               i2c1 = &i2c1;
-       };
-
-       memory@0 {
-               name = "memory";
-               device_type = "memory";
-               reg = <0x0 0x80000000>; /* 2GB */
-       };
-
-       chosen {
-               stdout-path = "serial1:115200n8";
-       };
-};
-
-&eccmgr {
-       sdmmca-ecc@ff8c2c00 {
-               compatible = "altr,socfpga-sdmmc-ecc";
-               reg = <0xff8c2c00 0x400>;
-               altr,ecc-parent = <&mmc>;
-               interrupts = <15 IRQ_TYPE_LEVEL_HIGH>,
-                            <47 IRQ_TYPE_LEVEL_HIGH>,
-                            <16 IRQ_TYPE_LEVEL_HIGH>,
-                            <48 IRQ_TYPE_LEVEL_HIGH>;
-       };
-};
-
-&gmac0 {
-       phy-mode = "rgmii";
-       phy-addr = <0xffffffff>; /* probe for phy addr */
-
-       max-frame-size = <3800>;
-       status = "okay";
-
-       phy-handle = <&phy3>;
-
-       mdio {
-               #address-cells = <1>;
-               #size-cells = <0>;
-               compatible = "snps,dwmac-mdio";
-               phy3: ethernet-phy@3 {
-                       txd0-skew-ps = <0>; /* -420ps */
-                       txd1-skew-ps = <0>; /* -420ps */
-                       txd2-skew-ps = <0>; /* -420ps */
-                       txd3-skew-ps = <0>; /* -420ps */
-                       rxd0-skew-ps = <420>; /* 0ps */
-                       rxd1-skew-ps = <420>; /* 0ps */
-                       rxd2-skew-ps = <420>; /* 0ps */
-                       rxd3-skew-ps = <420>; /* 0ps */
-                       txen-skew-ps = <0>; /* -420ps */
-                       txc-skew-ps = <1860>; /* 960ps */
-                       rxdv-skew-ps = <420>; /* 0ps */
-                       rxc-skew-ps = <1680>; /* 780ps */
-                       reg = <3>;
-               };
-       };
-};
-
-&gpio0 {
-       status = "okay";
-};
-
-&gpio1 {
-       status = "okay";
-};
-
-&gpio2 {
-       status = "okay";
-};
-
-&i2c1 {
-       status = "okay";
-       isl12022: isl12022@6f {
-               status = "okay";
-               compatible = "isil,isl12022";
-               reg = <0x6f>;
-       };
-};
-
-/* Following mappings are taken from arria10 socdk dts */
-&mmc {
-       status = "okay";
-       cap-sd-highspeed;
-       broken-cd;
-       bus-width = <4>;
-};
-
-&osc1 {
-       clock-frequency = <33330000>;
-};
-
-&uart1 {
-       status = "okay";
-};
-
-&usb0 {
-       status = "okay";
-       dr_mode = "host";
-};
diff --git a/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dtsi b/arch/arm/boot/dts/socfpga_arria10_mercury_aa1.dtsi
new file mode 100644 (file)
index 0000000..4b21351
--- /dev/null
@@ -0,0 +1,84 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include "socfpga_arria10.dtsi"
+
+/ {
+
+       model = "Enclustra Mercury AA1";
+       compatible = "enclustra,mercury-aa1", "altr,socfpga-arria10", "altr,socfpga";
+
+       aliases {
+               ethernet0 = &gmac0;
+               serial1 = &uart1;
+       };
+
+       memory@0 {
+               name = "memory";
+               device_type = "memory";
+               reg = <0x0 0x80000000>; /* 2GB */
+       };
+
+       chosen {
+               stdout-path = "serial1:115200n8";
+       };
+};
+
+&eccmgr {
+       sdmmca-ecc@ff8c2c00 {
+               compatible = "altr,socfpga-sdmmc-ecc";
+               reg = <0xff8c2c00 0x400>;
+               altr,ecc-parent = <&mmc>;
+               interrupts = <15 IRQ_TYPE_LEVEL_HIGH>,
+                            <47 IRQ_TYPE_LEVEL_HIGH>,
+                            <16 IRQ_TYPE_LEVEL_HIGH>,
+                            <48 IRQ_TYPE_LEVEL_HIGH>;
+       };
+};
+
+&gmac0 {
+       phy-mode = "rgmii";
+       phy-addr = <0xffffffff>; /* probe for phy addr */
+
+       max-frame-size = <3800>;
+
+       phy-handle = <&phy3>;
+
+       mdio {
+               #address-cells = <1>;
+               #size-cells = <0>;
+               compatible = "snps,dwmac-mdio";
+               phy3: ethernet-phy@3 {
+                       txd0-skew-ps = <0>; /* -420ps */
+                       txd1-skew-ps = <0>; /* -420ps */
+                       txd2-skew-ps = <0>; /* -420ps */
+                       txd3-skew-ps = <0>; /* -420ps */
+                       rxd0-skew-ps = <420>; /* 0ps */
+                       rxd1-skew-ps = <420>; /* 0ps */
+                       rxd2-skew-ps = <420>; /* 0ps */
+                       rxd3-skew-ps = <420>; /* 0ps */
+                       txen-skew-ps = <0>; /* -420ps */
+                       txc-skew-ps = <1860>; /* 960ps */
+                       rxdv-skew-ps = <420>; /* 0ps */
+                       rxc-skew-ps = <1680>; /* 780ps */
+                       reg = <3>;
+               };
+       };
+};
+
+&i2c1 {
+       isl12022: isl12022@6f {
+               compatible = "isil,isl12022";
+               reg = <0x6f>;
+       };
+};
+
+/* Following mappings are taken from arria10 socdk dts */
+&mmc {
+       cap-sd-highspeed;
+       broken-cd;
+       bus-width = <4>;
+};
+
+&osc1 {
+       clock-frequency = <33330000>;
+};