arm64: dts: renesas: beacon: Enable SPI

The baseboard routes the SPI to a header which can/will be configured at
either the kit level or using device tree overlays.  Because the baseboard
be supporting more than one kit, enable at the baseboard level rather
than a bunch of duplicates later.

Signed-off-by: Adam Ford <aford173@gmail.com>
Link: https://lore.kernel.org/r/20201213183759.223246-14-aford173@gmail.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi
index 987df78ec44ec523e525bfb896d86a08e6bb098a..cb316e736364358ed74f2d8bad471415d73b9bc5 100644 (file)
--- a/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi
+++ b/arch/arm64/boot/dts/renesas/beacon-renesom-baseboard.dtsi
@@ -478,6 +478,13 @@
        };
 };
 
+&msiof1 {
+       pinctrl-0 = <&msiof1_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+       cs-gpios = <&gpio3 10 GPIO_ACTIVE_LOW>;
+};
+
 &ohci0 {
        dr_mode = "otg";
        status = "okay";
@@ -531,6 +538,11 @@
                bias-pull-down;
        };
 
+       msiof1_pins: msiof1 {
+               groups = "msiof1_clk_g", "msiof1_rxd_g", "msiof1_txd_g";
+               function = "msiof1";
+       };
+
        pwm0_pins: pwm0 {
                groups = "pwm0";
                function = "pwm0";