media: cec-pin: fix off-by-one SFT check

The CEC pin framework has to wait for the CEC bus to be idle for the
requested Signal Free Time before it can start a transmit.

However, the check for that was off by one, so transmits would start one
bit period (2.4ms) too late.

Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>

diff --git a/drivers/media/cec/core/cec-pin.c b/drivers/media/cec/core/cec-pin.c
index 8c613aa649c6f06eddd04ac2deeae47cf52c9f96..a60b6f03a6a1adece2a56db5be88cca5a6bed65f 100644 (file)
--- a/drivers/media/cec/core/cec-pin.c
+++ b/drivers/media/cec/core/cec-pin.c
@@ -957,7 +957,7 @@ static enum hrtimer_restart cec_pin_timer(struct hrtimer *timer)
                         * so we can kick off the pending transmit.
                         */
                        delta = ktime_us_delta(ts, pin->ts);
-                       if (delta / CEC_TIM_DATA_BIT_TOTAL >
+                       if (delta / CEC_TIM_DATA_BIT_TOTAL >=
                            pin->tx_signal_free_time) {
                                pin->tx_nacked = false;
                                if (tx_custom_start(pin))
@@ -968,7 +968,7 @@ static enum hrtimer_restart cec_pin_timer(struct hrtimer *timer)
                                cec_pin_low(pin);
                                break;
                        }
-                       if (delta / CEC_TIM_DATA_BIT_TOTAL >
+                       if (delta / CEC_TIM_DATA_BIT_TOTAL >=
                            pin->tx_signal_free_time - 1)
                                pin->state = CEC_ST_TX_WAIT;
                        break;