target-arm: When setting FPSCR.QC, don't clear other FPSCR bits

This patch fixes a bug affecting a variety of Neon instructions, such as
VQADD.

Signed-off-by: Matt Craighead <mjcraighead@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

diff --git a/target-arm/neon_helper.c b/target-arm/neon_helper.c
index 1e02d61bdc0c4501769509e8e93cd9d66150c0cb..e0b9dbf67e6e9ca84a88afded50cf826a74f6f83 100644 (file)
--- a/target-arm/neon_helper.c
+++ b/target-arm/neon_helper.c
@@ -16,7 +16,7 @@
 #define SIGNBIT (uint32_t)0x80000000
 #define SIGNBIT64 ((uint64_t)1 << 63)
 
-#define SET_QC() env->vfp.xregs[ARM_VFP_FPSCR] = CPSR_Q
+#define SET_QC() env->vfp.xregs[ARM_VFP_FPSCR] |= CPSR_Q
 
 #define NEON_TYPE1(name, type) \
 typedef struct \