clk: qcom: gcc-ipq806x: add additional freq for sdc table

Add additional freq supported for the sdc table. The ops are changed to
the floor_ops to handle a freq request of 52kHz where we need to provide
a freq of 51.2kHz instead for stability reason.

Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Tested-by: Jonathan McDowell <noodles@earth.li>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220226135235.10051-11-ansuelsmth@gmail.com

diff --git a/drivers/clk/qcom/gcc-ipq806x.c b/drivers/clk/qcom/gcc-ipq806x.c
index 983d0758693062c6c2194a91c14e6a38ccdd1632..f3d56519eee5a7022b806057d8458d7060337572 100644 (file)
--- a/drivers/clk/qcom/gcc-ipq806x.c
+++ b/drivers/clk/qcom/gcc-ipq806x.c
@@ -1292,6 +1292,7 @@ static const struct freq_tbl clk_tbl_sdc[] = {
        {  20210000, P_PLL8,  1, 1,  19 },
        {  24000000, P_PLL8,  4, 1,   4 },
        {  48000000, P_PLL8,  4, 1,   2 },
+       {  51200000, P_PLL8,  1, 2,  15 },
        {  64000000, P_PLL8,  3, 1,   2 },
        {  96000000, P_PLL8,  4, 0,   0 },
        { 192000000, P_PLL8,  2, 0,   0 },
@@ -1325,7 +1326,7 @@ static struct clk_rcg sdc1_src = {
                        .name = "sdc1_src",
                        .parent_data = gcc_pxo_pll8,
                        .num_parents = ARRAY_SIZE(gcc_pxo_pll8),
-                       .ops = &clk_rcg_ops,
+                       .ops = &clk_rcg_floor_ops,
                },
        }
 };