accel/habanalabs: minor cosmetics update to cpucp_if.h
authorOded Gabbay <ogabbay@kernel.org>
Thu, 21 Sep 2023 11:52:01 +0000 (14:52 +0300)
committerOded Gabbay <ogabbay@kernel.org>
Mon, 9 Oct 2023 09:37:23 +0000 (12:37 +0300)
- Update copyright years
- Align comments

Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Reviewed-by: Ofir Bitton <obitton@habana.ai>
include/linux/habanalabs/cpucp_if.h

index 84d74c4ee4d3364cacba0e0db665a8e32d01428d..86ea7c63a0d297cfbf4e874ce3a4153f6f970b08 100644 (file)
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0
  *
- * Copyright 2020-2022 HabanaLabs, Ltd.
+ * Copyright 2020-2023 HabanaLabs, Ltd.
  * All Rights Reserved.
  *
  */
@@ -668,18 +668,15 @@ enum pq_init_status {
  *       Obsolete.
  *
  * CPUCP_PACKET_GENERIC_PASSTHROUGH -
- *      Generic opcode for all firmware info that is only passed to host
- *      through the LKD, without getting parsed there.
+ *       Generic opcode for all firmware info that is only passed to host
+ *       through the LKD, without getting parsed there.
  *
  * CPUCP_PACKET_ACTIVE_STATUS_SET -
  *       LKD sends FW indication whether device is free or in use, this indication is reported
  *       also to the BMC.
  *
- * CPUCP_PACKET_REGISTER_INTERRUPTS -
- *       Packet to register interrupts indicating LKD is ready to receive events from FW.
- *
  * CPUCP_PACKET_SOFT_RESET -
- *      Packet to perform soft-reset.
+ *       Packet to perform soft-reset.
  *
  * CPUCP_PACKET_INTS_REGISTER -
  *       Packet to inform FW that queues have been established and LKD is ready to receive
@@ -750,9 +747,9 @@ enum cpucp_packet_id {
        CPUCP_PACKET_RESERVED11,                /* not used */
        CPUCP_PACKET_RESERVED12,                /* internal */
        CPUCP_PACKET_RESERVED13,                /* internal */
-       CPUCP_PACKET_SOFT_RESET,                /* internal */
-       CPUCP_PACKET_INTS_REGISTER,             /* internal */
-       CPUCP_PACKET_ID_MAX                     /* must be last */
+       CPUCP_PACKET_SOFT_RESET,                /* internal */
+       CPUCP_PACKET_INTS_REGISTER,             /* internal */
+       CPUCP_PACKET_ID_MAX                     /* must be last */
 };
 
 #define CPUCP_PACKET_FENCE_VAL 0xFE8CE7A5