riscv: Add X register names to gpr-nums
authorAndrew Jones <ajones@ventanamicro.com>
Sun, 2 Oct 2022 04:47:58 +0000 (10:17 +0530)
committerAnup Patel <anup@brainfault.org>
Sun, 2 Oct 2022 04:47:58 +0000 (10:17 +0530)
When encoding instructions it's sometimes necessary to set a
register field to a precise number. This is easiest to do using
the x<num> naming.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Anup Patel <anup@brainfault.org>
arch/riscv/include/asm/gpr-num.h

index dfee2829fc7cb0ad7dc2ca27f4414262e0075c84..efeb5edf8a3af15052c68fc8a95a3091a2d3af46 100644 (file)
@@ -3,6 +3,11 @@
 #define __ASM_GPR_NUM_H
 
 #ifdef __ASSEMBLY__
+
+       .irp    num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31
+       .equ    .L__gpr_num_x\num, \num
+       .endr
+
        .equ    .L__gpr_num_zero,       0
        .equ    .L__gpr_num_ra,         1
        .equ    .L__gpr_num_sp,         2
@@ -39,6 +44,9 @@
 #else /* __ASSEMBLY__ */
 
 #define __DEFINE_ASM_GPR_NUMS                                  \
+"      .irp    num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31\n" \
+"      .equ    .L__gpr_num_x\\num, \\num\n"                    \
+"      .endr\n"                                                \
 "      .equ    .L__gpr_num_zero,       0\n"                    \
 "      .equ    .L__gpr_num_ra,         1\n"                    \
 "      .equ    .L__gpr_num_sp,         2\n"                    \