u32 gotgint;
u32 gotgctl;
u32 gintmsk;
+ u32 pcgctl;
gotgint = dwc2_readl(hsotg, GOTGINT);
gotgctl = dwc2_readl(hsotg, GOTGCTL);
dwc2_op_state_str(hsotg));
gotgctl = dwc2_readl(hsotg, GOTGCTL);
- if (dwc2_is_device_mode(hsotg))
+ if (dwc2_is_device_mode(hsotg)) {
+ if (hsotg->params.eusb2_disc) {
+ /* Clear the Gate hclk. */
+ pcgctl = dwc2_readl(hsotg, PCGCTL);
+ pcgctl &= ~PCGCTL_GATEHCLK;
+ dwc2_writel(hsotg, pcgctl, PCGCTL);
+ udelay(5);
+
+ /* Clear Phy Clock bit. */
+ pcgctl = dwc2_readl(hsotg, PCGCTL);
+ pcgctl &= ~PCGCTL_STOPPCLK;
+ dwc2_writel(hsotg, pcgctl, PCGCTL);
+ udelay(5);
+ }
dwc2_hsotg_disconnect(hsotg);
+ }
if (hsotg->op_state == OTG_STATE_B_HOST) {
hsotg->op_state = OTG_STATE_B_PERIPHERAL;
* disconnected
*/
/* Reset to a clean state */
- hsotg->lx_state = DWC2_L0;
+ hsotg->lx_state = DWC2_L3;
}
gotgctl = dwc2_readl(hsotg, GOTGCTL);
hsotg->lx_state);
if (dwc2_is_device_mode(hsotg)) {
- if (hsotg->lx_state == DWC2_L2) {
+ if (hsotg->lx_state != DWC2_L0) {
if (hsotg->in_ppd) {
ret = dwc2_exit_partial_power_down(hsotg, 0,
true);
dwc2_hsotg_init_fifo(hsotg);
- if (!is_usb_reset)
+ if (!is_usb_reset) {
dwc2_set_bit(hsotg, DCTL, DCTL_SFTDISCON);
+ if (hsotg->params.eusb2_disc)
+ dwc2_set_bit(hsotg, GOTGCTL, GOTGCTL_EUSB2_DISC_SUPP);
+ }
dcfg |= DCFG_EPMISCNT(1);