hwmon: (max31790) revise the scale to write pwm
authorDelphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
Tue, 16 Apr 2024 02:22:11 +0000 (10:22 +0800)
committerGuenter Roeck <linux@roeck-us.net>
Wed, 1 May 2024 14:47:45 +0000 (07:47 -0700)
Since the value for PWMOUT Target Duty Cycle register is a 9 bit
left-justified value that ranges from 0 to 511 and is contained in 2
bytes.

There is an issue that the PWM signal recorded by oscilloscope would
not be on consistently if we set PWM to 100% to the driver.

It is because the LSB of the 9 bit would always be zero if it just
left shift 8 bit for the value that write to PWMOUT Target Duty
Cycle register.

Therefore, revise the scale of the value that was written to pwm input
from 255 to 511 and modify the value to left-justified value.

Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
Link: https://lore.kernel.org/r/20240416022211.859483-1-Delphine_CC_Chiu@wiwynn.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
drivers/hwmon/max31790.c

index 3dc95196b229ad46376d3a3b6928cf866e5b42d0..7aa1aa63bf1b8d8bac8af21bcd20e9c3f5f8dd81 100644 (file)
@@ -49,6 +49,9 @@
 
 #define NR_CHANNEL                     6
 
+#define PWM_INPUT_SCALE        255
+#define MAX31790_REG_PWMOUT_SCALE      511
+
 /*
  * Client data (each client gets its own)
  */
@@ -343,10 +346,13 @@ static int max31790_write_pwm(struct device *dev, u32 attr, int channel,
                        err = -EINVAL;
                        break;
                }
+
+               val = DIV_ROUND_CLOSEST(val * MAX31790_REG_PWMOUT_SCALE,
+                                       PWM_INPUT_SCALE);
                data->valid = false;
                err = i2c_smbus_write_word_swapped(client,
                                                   MAX31790_REG_PWMOUT(channel),
-                                                  val << 8);
+                                                  val << 7);
                break;
        case hwmon_pwm_enable:
                fan_config = data->fan_config[channel];