arm64: dts: ls1028a: delete extraneous #interrupt-cells for ENETC RCIE

This specifier overrides the interrupt specifier with 3 cells from gic
(/interrupt-controller@6000000), but in fact ENETC is not an interrupt
controller, so the property is bogus.

Interrupts used by the children of the ENETC RCIE must use the full
3-cell specifier required by the GIC.

The issue has no functional consequence so there is no real reason to
port the patch to stable trees.

Fixes: 927d7f857542 ("arm64: dts: fsl: ls1028a: Add PCI IERC node and ENETC endpoints")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
index 8694098aa94be9872d4f873f8c41f648715b5f2c..6e406a6a16cf4e6ff944526aac28659d4aaffffb 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
@@ -722,7 +722,6 @@
                        reg = <0x01 0xf0000000 0x0 0x100000>;
                        #address-cells = <3>;
                        #size-cells = <2>;
-                       #interrupt-cells = <1>;
                        msi-parent = <&its>;
                        device_type = "pci";
                        bus-range = <0x0 0x0>;