drm/amd/powerplay: enable ULCK DS for sienna_cichlid

Enable uclk deep sleep for sienna_cichlid.
Df cstate kicks in first, then df triggers uclk ds with the sideband.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
index 545b4efc2bfa8ed8014146d9cf4d890b53d05c89..8e3fe192e50a5e9690453160b9bccbbb3c16e28e 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
@@ -301,6 +301,7 @@ sienna_cichlid_get_allowed_feature_mask(struct smu_context *smu,
                                | FEATURE_MASK(FEATURE_DS_SOCCLK_BIT)
                                | FEATURE_MASK(FEATURE_DS_DCEFCLK_BIT)
                                | FEATURE_MASK(FEATURE_DS_FCLK_BIT)
+                               | FEATURE_MASK(FEATURE_DS_UCLK_BIT)
                                | FEATURE_MASK(FEATURE_FW_DSTATE_BIT)
                                | FEATURE_MASK(FEATURE_DF_CSTATE_BIT)
                                | FEATURE_MASK(FEATURE_RSMU_SMN_CG_BIT)