arm64: dts: ti: k3-j721s2-mcu-wakeup: Add support of OSPI
authorAswath Govindraju <a-govindraju@ti.com>
Fri, 31 Mar 2023 09:00:23 +0000 (14:30 +0530)
committerVignesh Raghavendra <vigneshr@ti.com>
Wed, 14 Jun 2023 10:42:19 +0000 (16:12 +0530)
Add support for two instance of OSPI in J721S2 SoC.

Reviewed-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Matt Ranostay <mranostay@ti.com>
Signed-off-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20230331090028.8373-4-r-gunasekaran@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi

index a353705a7463eb3c1a7e73ccf033a94bafa81600..6e981fe4727eb98b433635eb6fe21d032f742882 100644 (file)
                        compatible = "ti,am3359-adc";
                };
        };
+
+       fss: bus@47000000 {
+               compatible = "simple-bus";
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges = <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>,
+                        <0x05 0x00000000 0x05 0x00000000 0x01 0x00000000>,
+                        <0x07 0x00000000 0x07 0x00000000 0x01 0x00000000>;
+
+               ospi0: spi@47040000 {
+                       compatible = "ti,am654-ospi", "cdns,qspi-nor";
+                       reg = <0x00 0x47040000 0x00 0x100>,
+                             <0x05 0x00000000 0x01 0x00000000>;
+                       interrupts = <GIC_SPI 840 IRQ_TYPE_LEVEL_HIGH>;
+                       cdns,fifo-depth = <256>;
+                       cdns,fifo-width = <4>;
+                       cdns,trigger-address = <0x0>;
+                       clocks = <&k3_clks 109 5>;
+                       assigned-clocks = <&k3_clks 109 5>;
+                       assigned-clock-parents = <&k3_clks 109 7>;
+                       assigned-clock-rates = <166666666>;
+                       power-domains = <&k3_pds 109 TI_SCI_PD_EXCLUSIVE>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       status = "disabled"; /* Needs pinmux */
+               };
+
+               ospi1: spi@47050000 {
+                       compatible = "ti,am654-ospi", "cdns,qspi-nor";
+                       reg = <0x00 0x47050000 0x00 0x100>,
+                             <0x07 0x00000000 0x01 0x00000000>;
+                       interrupts = <GIC_SPI 841 IRQ_TYPE_LEVEL_HIGH>;
+                       cdns,fifo-depth = <256>;
+                       cdns,fifo-width = <4>;
+                       cdns,trigger-address = <0x0>;
+                       clocks = <&k3_clks 110 5>;
+                       power-domains = <&k3_pds 110 TI_SCI_PD_EXCLUSIVE>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       status = "disabled"; /* Needs pinmux */
+               };
+       };
 };