arm64: dts: imx93: add extra lpspi node
authorPeng Fan <peng.fan@nxp.com>
Thu, 20 Oct 2022 10:17:01 +0000 (18:17 +0800)
committerShawn Guo <shawnguo@kernel.org>
Sat, 29 Oct 2022 07:43:32 +0000 (15:43 +0800)
Add more lpspi nodes which exist in i.MX93

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/imx93.dtsi

index d8e2301a4831dbf0fea978e30b60aa590b7bdc14..4b4a500ed86cfebec3d5149ba7d3f5525f80720d 100644 (file)
                                status = "disabled";
                        };
 
+                       lpspi3: spi@42550000 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
+                               reg = <0x42550000 0x10000>;
+                               interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clk IMX93_CLK_LPSPI3_GATE>,
+                                        <&clk IMX93_CLK_BUS_WAKEUP>;
+                               clock-names = "per", "ipg";
+                               status = "disabled";
+                       };
+
+                       lpspi4: spi@42560000 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
+                               reg = <0x42560000 0x10000>;
+                               interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clk IMX93_CLK_LPSPI4_GATE>,
+                                        <&clk IMX93_CLK_BUS_WAKEUP>;
+                               clock-names = "per", "ipg";
+                               status = "disabled";
+                       };
+
                        lpuart3: serial@42570000 {
                                compatible = "fsl,imx93-lpuart", "fsl,imx7ulp-lpuart";
                                reg = <0x42570000 0x1000>;
                                status = "disabled";
                        };
 
+                       lpspi5: spi@426f0000 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
+                               reg = <0x426f0000 0x10000>;
+                               interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clk IMX93_CLK_LPSPI5_GATE>,
+                                        <&clk IMX93_CLK_BUS_WAKEUP>;
+                               clock-names = "per", "ipg";
+                               status = "disabled";
+                       };
+
+                       lpspi6: spi@42700000 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
+                               reg = <0x42700000 0x10000>;
+                               interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clk IMX93_CLK_LPSPI6_GATE>,
+                                        <&clk IMX93_CLK_BUS_WAKEUP>;
+                               clock-names = "per", "ipg";
+                               status = "disabled";
+                       };
+
+                       lpspi7: spi@42710000 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
+                               reg = <0x42710000 0x10000>;
+                               interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clk IMX93_CLK_LPSPI7_GATE>,
+                                        <&clk IMX93_CLK_BUS_WAKEUP>;
+                               clock-names = "per", "ipg";
+                               status = "disabled";
+                       };
+
+                       lpspi8: spi@42720000 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               compatible = "fsl,imx93-spi", "fsl,imx7ulp-spi";
+                               reg = <0x42720000 0x10000>;
+                               interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&clk IMX93_CLK_LPSPI8_GATE>,
+                                        <&clk IMX93_CLK_BUS_WAKEUP>;
+                               clock-names = "per", "ipg";
+                               status = "disabled";
+                       };
+
                };
 
                aips3: bus@42800000 {