firmware: xilinx: Add ZynqMP SHA API for SHA3 functionality
authorHarsha <harsha.harsha@xilinx.com>
Wed, 23 Feb 2022 10:35:02 +0000 (16:05 +0530)
committerHerbert Xu <herbert@gondor.apana.org.au>
Wed, 2 Mar 2022 22:49:21 +0000 (10:49 +1200)
This patch adds zynqmp_pm_sha_hash API in the ZynqMP firmware to compute
SHA3 hash of given data.

Signed-off-by: Harsha <harsha.harsha@xilinx.com>
Signed-off-by: Kalyani Akula <kalyani.akula@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
drivers/firmware/xilinx/zynqmp.c
include/linux/firmware/xlnx-zynqmp.h

index 450c5f6a1cbf1db924378f7083538effb054310e..5e5b0bb2e4e020b549ef3202aaff5408b644a6a4 100644 (file)
@@ -1120,6 +1120,32 @@ int zynqmp_pm_aes_engine(const u64 address, u32 *out)
 }
 EXPORT_SYMBOL_GPL(zynqmp_pm_aes_engine);
 
+/**
+ * zynqmp_pm_sha_hash - Access the SHA engine to calculate the hash
+ * @address:   Address of the data/ Address of output buffer where
+ *             hash should be stored.
+ * @size:      Size of the data.
+ * @flags:
+ *     BIT(0) - for initializing csudma driver and SHA3(Here address
+ *              and size inputs can be NULL).
+ *     BIT(1) - to call Sha3_Update API which can be called multiple
+ *              times when data is not contiguous.
+ *     BIT(2) - to get final hash of the whole updated data.
+ *              Hash will be overwritten at provided address with
+ *              48 bytes.
+ *
+ * Return:     Returns status, either success or error code.
+ */
+int zynqmp_pm_sha_hash(const u64 address, const u32 size, const u32 flags)
+{
+       u32 lower_addr = lower_32_bits(address);
+       u32 upper_addr = upper_32_bits(address);
+
+       return zynqmp_pm_invoke_fn(PM_SECURE_SHA, upper_addr, lower_addr,
+                                  size, flags, NULL);
+}
+EXPORT_SYMBOL_GPL(zynqmp_pm_sha_hash);
+
 /**
  * zynqmp_pm_register_notifier() - PM API for register a subsystem
  *                                to be notified about specific
index 907cb01890cf785cb079e6ad3d3ab4a34ff8e1de..f6783f58c64a9992861c229c61eccbc39848447f 100644 (file)
@@ -93,6 +93,7 @@ enum pm_api_id {
        PM_FPGA_LOAD = 22,
        PM_FPGA_GET_STATUS = 23,
        PM_GET_CHIPID = 24,
+       PM_SECURE_SHA = 26,
        PM_PINCTRL_REQUEST = 28,
        PM_PINCTRL_RELEASE = 29,
        PM_PINCTRL_GET_FUNCTION = 30,
@@ -427,6 +428,7 @@ int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities,
                              const u32 qos,
                              const enum zynqmp_pm_request_ack ack);
 int zynqmp_pm_aes_engine(const u64 address, u32 *out);
+int zynqmp_pm_sha_hash(const u64 address, const u32 size, const u32 flags);
 int zynqmp_pm_fpga_load(const u64 address, const u32 size, const u32 flags);
 int zynqmp_pm_fpga_get_status(u32 *value);
 int zynqmp_pm_write_ggs(u32 index, u32 value);
@@ -601,6 +603,12 @@ static inline int zynqmp_pm_aes_engine(const u64 address, u32 *out)
        return -ENODEV;
 }
 
+static inline int zynqmp_pm_sha_hash(const u64 address, const u32 size,
+                                    const u32 flags)
+{
+       return -ENODEV;
+}
+
 static inline int zynqmp_pm_fpga_load(const u64 address, const u32 size,
                                      const u32 flags)
 {