};
        };
 
+       gpu_opp_table: opp-table-1 {
+               compatible = "operating-points-v2";
+
+               opp-200000000 {
+                       opp-hz = /bits/ 64 <200000000>;
+                       opp-microvolt = <825000>;
+               };
+
+               opp-300000000 {
+                       opp-hz = /bits/ 64 <300000000>;
+                       opp-microvolt = <825000>;
+               };
+
+               opp-400000000 {
+                       opp-hz = /bits/ 64 <400000000>;
+                       opp-microvolt = <825000>;
+               };
+
+               opp-600000000 {
+                       opp-hz = /bits/ 64 <600000000>;
+                       opp-microvolt = <825000>;
+               };
+
+               opp-700000000 {
+                       opp-hz = /bits/ 64 <700000000>;
+                       opp-microvolt = <900000>;
+               };
+
+               opp-800000000 {
+                       opp-hz = /bits/ 64 <800000000>;
+                       opp-microvolt = <1000000>;
+               };
+       };
+
        pmu {
                compatible = "arm,cortex-a55-pmu";
                interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>,
                };
        };
 
+       gpu: gpu@fde60000 {
+               compatible = "rockchip,rk3568-mali", "arm,mali-bifrost";
+               reg = <0x0 0xfde60000 0x0 0x4000>;
+               interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "job", "mmu", "gpu";
+               clocks = <&scmi_clk 1>, <&cru CLK_GPU>;
+               clock-names = "gpu", "bus";
+               #cooling-cells = <2>;
+               operating-points-v2 = <&gpu_opp_table>;
+               power-domains = <&power RK3568_PD_GPU>;
+               status = "disabled";
+       };
+
        sdmmc2: mmc@fe000000 {
                compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc";
                reg = <0x0 0xfe000000 0x0 0x4000>;