arm64: dts: qcom: sc8280xp: enable GICv3 ITS for PCIe
authorJohan Hovold <johan+linaro@kernel.org>
Wed, 6 Mar 2024 09:56:51 +0000 (10:56 +0100)
committerBjorn Andersson <andersson@kernel.org>
Mon, 18 Mar 2024 01:26:19 +0000 (20:26 -0500)
The DWC PCIe controller can be used with its internal MSI controller or
with an external one such as the GICv3 Interrupt Translation Service
(ITS).

Add the msi-map properties needed to use the GIC ITS. This will also
make Linux switch to the ITS implementation, which allows for assigning
affinity to individual MSIs.

Note that using the GIC ITS on SC8280XP will cause Advanced Error
Reporting (AER) interrupts to be received on errors unlike when using
the internal MSI controller. This will specifically lead to
notifications about Correctable Errors being logged for the Wi-Fi
controller on the Lenovo ThinkPad X13s when ASPM L0s is enabled.

Suggested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20240306095651.4551-6-johan+linaro@kernel.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/sc8280xp.dtsi

index f42fc469af73b2f812353060a6f94e4b9a17f5e9..f3eb39f22702aeb6bdd7ce1843a89a01cfc33cf4 100644 (file)
                        linux,pci-domain = <6>;
                        num-lanes = <1>;
 
+                       msi-map = <0x0 &its 0xe0000 0x10000>;
+
                        interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
                        linux,pci-domain = <5>;
                        num-lanes = <2>;
 
+                       msi-map = <0x0 &its 0xd0000 0x10000>;
+
                        interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
                        linux,pci-domain = <4>;
                        num-lanes = <4>;
 
+                       msi-map = <0x0 &its 0xc0000 0x10000>;
+
                        interrupts = <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
                        linux,pci-domain = <3>;
                        num-lanes = <2>;
 
+                       msi-map = <0x0 &its 0xb0000 0x10000>;
+
                        interrupts = <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
                        linux,pci-domain = <2>;
                        num-lanes = <4>;
 
+                       msi-map = <0x0 &its 0xa0000 0x10000>;
+
                        interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 523 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 524 IRQ_TYPE_LEVEL_HIGH>,
                        #size-cells = <2>;
                        ranges;
 
-                       msi-controller@17a40000 {
+                       its: msi-controller@17a40000 {
                                compatible = "arm,gic-v3-its";
                                reg = <0 0x17a40000 0 0x20000>;
                                msi-controller;