clk: sunxi-ng: mux: Add macros using clk_parent_data and clk_hw

Referencing parents with clk_hw pointers is more efficient and removes
the dependency on global clock names. clk_parent_data is needed when
some parent clocks are provided from another driver. Add macros for
declaring muxes that take advantage of these.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20211119043545.4010-5-samuel@sholland.org

diff --git a/drivers/clk/sunxi-ng/ccu_mux.h b/drivers/clk/sunxi-ng/ccu_mux.h
index e31efc509b3dab9cc275f6872783b7ba03a1e6c0..2c1811a445b0b564390a5d1ab76aed24d3cd283b 100644 (file)
--- a/drivers/clk/sunxi-ng/ccu_mux.h
+++ b/drivers/clk/sunxi-ng/ccu_mux.h
@@ -72,6 +72,39 @@ struct ccu_mux {
        SUNXI_CCU_MUX_TABLE_WITH_GATE(_struct, _name, _parents, NULL,   \
                                      _reg, _shift, _width, 0, _flags)
 
+#define SUNXI_CCU_MUX_DATA_WITH_GATE(_struct, _name, _parents, _reg,   \
+                                    _shift, _width, _gate, _flags)     \
+       struct ccu_mux _struct = {                                      \
+               .enable = _gate,                                        \
+               .mux    = _SUNXI_CCU_MUX(_shift, _width),               \
+               .common = {                                             \
+                       .reg            = _reg,                         \
+                       .hw.init        = CLK_HW_INIT_PARENTS_DATA(_name, \
+                                                                  _parents, \
+                                                                  &ccu_mux_ops, \
+                                                                  _flags), \
+               }                                                       \
+       }
+
+#define SUNXI_CCU_MUX_DATA(_struct, _name, _parents, _reg,             \
+                     _shift, _width, _flags)                           \
+       SUNXI_CCU_MUX_DATA_WITH_GATE(_struct, _name, _parents, _reg,    \
+                                    _shift, _width, 0, _flags)
+
+#define SUNXI_CCU_MUX_HW_WITH_GATE(_struct, _name, _parents, _reg,     \
+                                  _shift, _width, _gate, _flags)       \
+       struct ccu_mux _struct = {                                      \
+               .enable = _gate,                                        \
+               .mux    = _SUNXI_CCU_MUX(_shift, _width),               \
+               .common = {                                             \
+                       .reg            = _reg,                         \
+                       .hw.init        = CLK_HW_INIT_PARENTS_HW(_name, \
+                                                                _parents, \
+                                                                &ccu_mux_ops, \
+                                                                _flags), \
+               }                                                       \
+       }
+
 static inline struct ccu_mux *hw_to_ccu_mux(struct clk_hw *hw)
 {
        struct ccu_common *common = hw_to_ccu_common(hw);