dt-binding: iio: add NPCM ADC reset support
authorTomer Maimon <tmaimon77@gmail.com>
Mon, 3 Feb 2020 15:09:16 +0000 (17:09 +0200)
committerJonathan Cameron <Jonathan.Cameron@huawei.com>
Fri, 14 Feb 2020 15:06:24 +0000 (15:06 +0000)
Add NPCM ADC reset binding documentation.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Documentation/devicetree/bindings/iio/adc/nuvoton,npcm-adc.txt

index eb939fe778361dec1d7f0ce2ebb04b6eaa0d93f4..ef8eeec1a997f109db7bbea545aefbe181ccfc7d 100644 (file)
@@ -6,6 +6,7 @@ Required properties:
 - compatible: "nuvoton,npcm750-adc" for the NPCM7XX BMC.
 - reg: specifies physical base address and size of the registers.
 - interrupts: Contain the ADC interrupt with flags for falling edge.
+- resets : phandle to the reset control for this device.
 
 Optional properties:
 - clocks: phandle of ADC reference clock, in case the clock is not
@@ -21,4 +22,5 @@ adc: adc@f000c000 {
        reg = <0xf000c000 0x8>;
        interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
        clocks = <&clk NPCM7XX_CLK_ADC>;
+       resets = <&rstc NPCM7XX_RESET_IPSRST1 NPCM7XX_RESET_ADC>;
 };