drm/i915/mst: Clear ACT just before triggering payload allocation

Follow the bspec sequence more closely and clear ACT sent just
before triggering the allocation. Can't see why we'd want to
deviate from the spec sequence here.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231018154123.5479-4-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index b90a4d7604bc16b8a0647c2e4225a5c5b777f761..f379fcdebe9e6032c8ae8d1c59aff8304ab33ca4 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -791,8 +791,6 @@ static void intel_mst_enable_dp(struct intel_atomic_state *state,
 
        drm_WARN_ON(&dev_priv->drm, pipe_config->has_pch_encoder);
 
-       clear_act_sent(encoder, pipe_config);
-
        if (intel_dp_is_uhbr(pipe_config)) {
                const struct drm_display_mode *adjusted_mode =
                        &pipe_config->hw.adjusted_mode;
@@ -806,6 +804,8 @@ static void intel_mst_enable_dp(struct intel_atomic_state *state,
 
        intel_ddi_enable_transcoder_func(encoder, pipe_config);
 
+       clear_act_sent(encoder, pipe_config);
+
        intel_de_rmw(dev_priv, TRANS_DDI_FUNC_CTL(trans), 0,
                     TRANS_DDI_DP_VC_PAYLOAD_ALLOC);