drm/amdgpu: add VISIBLE info in amdgpu_bo_print_info
authorPierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Wed, 21 Jun 2023 08:42:07 +0000 (10:42 +0200)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 25 Jul 2023 17:47:26 +0000 (13:47 -0400)
This allows tools to distinguish between VRAM and visible VRAM.

Use the opportunity to fix locking before accessing bo.

v2: squash in unused variable fix

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c

index f7905bce0de15e49202dc23d022b9e68167bdcc8..88419927570a3a893c01762f8fa3631c37573829 100644 (file)
@@ -1575,23 +1575,31 @@ u64 amdgpu_bo_print_info(int id, struct amdgpu_bo *bo, struct seq_file *m)
 {
        struct dma_buf_attachment *attachment;
        struct dma_buf *dma_buf;
-       unsigned int domain;
        const char *placement;
        unsigned int pin_count;
        u64 size;
 
-       domain = amdgpu_mem_type_to_domain(bo->tbo.resource->mem_type);
-       switch (domain) {
-       case AMDGPU_GEM_DOMAIN_VRAM:
-               placement = "VRAM";
-               break;
-       case AMDGPU_GEM_DOMAIN_GTT:
-               placement = " GTT";
-               break;
-       case AMDGPU_GEM_DOMAIN_CPU:
-       default:
-               placement = " CPU";
-               break;
+       if (dma_resv_trylock(bo->tbo.base.resv)) {
+               unsigned int domain;
+               domain = amdgpu_mem_type_to_domain(bo->tbo.resource->mem_type);
+               switch (domain) {
+               case AMDGPU_GEM_DOMAIN_VRAM:
+                       if (amdgpu_bo_in_cpu_visible_vram(bo))
+                               placement = "VRAM VISIBLE";
+                       else
+                               placement = "VRAM";
+                       break;
+               case AMDGPU_GEM_DOMAIN_GTT:
+                       placement = "GTT";
+                       break;
+               case AMDGPU_GEM_DOMAIN_CPU:
+               default:
+                       placement = "CPU";
+                       break;
+               }
+               dma_resv_unlock(bo->tbo.base.resv);
+       } else {
+               placement = "UNKNOWN";
        }
 
        size = amdgpu_bo_size(bo);