target/mips: Extract FPU helpers to 'fpu_helper.h'

Extract FPU specific helpers from "internal.h" to "fpu_helper.h".

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20201120210844.2625602-2-f4bug@amsat.org>

diff --git a/linux-user/mips/cpu_loop.c b/linux-user/mips/cpu_loop.c
index 19947448a25beba1d9954c3e1a31b97620da76c6..9d813ece4e75a0537ef79c544d8b37bdc34d994a 100644 (file)
--- a/linux-user/mips/cpu_loop.c
+++ b/linux-user/mips/cpu_loop.c
@@ -23,6 +23,7 @@
 #include "cpu_loop-common.h"
 #include "elf.h"
 #include "internal.h"
+#include "fpu_helper.h"
 
 # ifdef TARGET_ABI_MIPSO32
 #  define MIPS_SYSCALL_NUMBER_UNUSED -1

diff --git a/target/mips/fpu_helper.c b/target/mips/fpu_helper.c
index 91b6a2e11fc58bcdc00e32636b0892d301339429..6dd853259e2e1150b556f13927f415b3b5260f9e 100644 (file)
--- a/target/mips/fpu_helper.c
+++ b/target/mips/fpu_helper.c
@@ -27,6 +27,7 @@
 #include "exec/exec-all.h"
 #include "exec/cpu_ldst.h"
 #include "fpu/softfloat.h"
+#include "fpu_helper.h"
 
 
 /* Complex FPU operations which may need stack space. */

diff --git a/target/mips/fpu_helper.h b/target/mips/fpu_helper.h
new file mode 100644 (file)
index 0000000..1c2d6d3
--- /dev/null
+++ b/target/mips/fpu_helper.h
@@ -0,0 +1,59 @@
+/*
+ * Helpers for emulation of FPU-related MIPS instructions.
+ *
+ *  Copyright (C) 2004-2005  Jocelyn Mayer
+ *
+ * SPDX-License-Identifier: LGPL-2.1-or-later
+ */
+#include "fpu/softfloat-helpers.h"
+#include "cpu.h"
+
+extern const FloatRoundMode ieee_rm[4];
+
+uint32_t float_class_s(uint32_t arg, float_status *fst);
+uint64_t float_class_d(uint64_t arg, float_status *fst);
+
+static inline void restore_rounding_mode(CPUMIPSState *env)
+{
+    set_float_rounding_mode(ieee_rm[env->active_fpu.fcr31 & 3],
+                            &env->active_fpu.fp_status);
+}
+
+static inline void restore_flush_mode(CPUMIPSState *env)
+{
+    set_flush_to_zero((env->active_fpu.fcr31 & (1 << FCR31_FS)) != 0,
+                      &env->active_fpu.fp_status);
+}
+
+static inline void restore_snan_bit_mode(CPUMIPSState *env)
+{
+    set_snan_bit_is_one((env->active_fpu.fcr31 & (1 << FCR31_NAN2008)) == 0,
+                        &env->active_fpu.fp_status);
+}
+
+static inline void restore_fp_status(CPUMIPSState *env)
+{
+    restore_rounding_mode(env);
+    restore_flush_mode(env);
+    restore_snan_bit_mode(env);
+}
+
+/* MSA */
+
+enum CPUMIPSMSADataFormat {
+    DF_BYTE = 0,
+    DF_HALF,
+    DF_WORD,
+    DF_DOUBLE
+};
+
+static inline void restore_msa_fp_status(CPUMIPSState *env)
+{
+    float_status *status = &env->active_tc.msa_fp_status;
+    int rounding_mode = (env->active_tc.msacsr & MSACSR_RM_MASK) >> MSACSR_RM;
+    bool flush_to_zero = (env->active_tc.msacsr & MSACSR_FS_MASK) != 0;
+
+    set_float_rounding_mode(ieee_rm[rounding_mode], status);
+    set_flush_to_zero(flush_to_zero, status);
+    set_flush_inputs_to_zero(flush_to_zero, status);
+}

diff --git a/target/mips/gdbstub.c b/target/mips/gdbstub.c
index e39f8d75cf08f25308ac6b3a0cae0d04562e5044..f1c2a2cf6d6a6a35cb2c3232daac43189a1b3b8d 100644 (file)
--- a/target/mips/gdbstub.c
+++ b/target/mips/gdbstub.c
@@ -21,6 +21,7 @@
 #include "cpu.h"
 #include "internal.h"
 #include "exec/gdbstub.h"
+#include "fpu_helper.h"
 
 int mips_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
 {

diff --git a/target/mips/internal.h b/target/mips/internal.h
index 77a648bcf9cb142550d7979d19b2c7df7b920ce4..f159187b24689e626cff009e872cfc7814b0cd65 100644 (file)
--- a/target/mips/internal.h
+++ b/target/mips/internal.h
@@ -9,7 +9,6 @@
 #define MIPS_INTERNAL_H
 
 #include "exec/memattrs.h"
-#include "fpu/softfloat-helpers.h"
 
 /*
  * MMU types, the first four entries have the same layout as the
@@ -75,13 +74,6 @@ struct mips_def_t {
 extern const struct mips_def_t mips_defs[];
 extern const int mips_defs_number;
 
-enum CPUMIPSMSADataFormat {
-    DF_BYTE = 0,
-    DF_HALF,
-    DF_WORD,
-    DF_DOUBLE
-};
-
 void mips_cpu_do_interrupt(CPUState *cpu);
 bool mips_cpu_exec_interrupt(CPUState *cpu, int int_req);
 void mips_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
@@ -220,49 +212,8 @@ bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
                        bool probe, uintptr_t retaddr);
 
 /* op_helper.c */
-uint32_t float_class_s(uint32_t arg, float_status *fst);
-uint64_t float_class_d(uint64_t arg, float_status *fst);
-
-extern const FloatRoundMode ieee_rm[4];
-
 void update_pagemask(CPUMIPSState *env, target_ulong arg1, int32_t *pagemask);
 
-static inline void restore_rounding_mode(CPUMIPSState *env)
-{
-    set_float_rounding_mode(ieee_rm[env->active_fpu.fcr31 & 3],
-                            &env->active_fpu.fp_status);
-}
-
-static inline void restore_flush_mode(CPUMIPSState *env)
-{
-    set_flush_to_zero((env->active_fpu.fcr31 & (1 << FCR31_FS)) != 0,
-                      &env->active_fpu.fp_status);
-}
-
-static inline void restore_snan_bit_mode(CPUMIPSState *env)
-{
-    set_snan_bit_is_one((env->active_fpu.fcr31 & (1 << FCR31_NAN2008)) == 0,
-                        &env->active_fpu.fp_status);
-}
-
-static inline void restore_fp_status(CPUMIPSState *env)
-{
-    restore_rounding_mode(env);
-    restore_flush_mode(env);
-    restore_snan_bit_mode(env);
-}
-
-static inline void restore_msa_fp_status(CPUMIPSState *env)
-{
-    float_status *status = &env->active_tc.msa_fp_status;
-    int rounding_mode = (env->active_tc.msacsr & MSACSR_RM_MASK) >> MSACSR_RM;
-    bool flush_to_zero = (env->active_tc.msacsr & MSACSR_FS_MASK) != 0;
-
-    set_float_rounding_mode(ieee_rm[rounding_mode], status);
-    set_flush_to_zero(flush_to_zero, status);
-    set_flush_inputs_to_zero(flush_to_zero, status);
-}
-
 static inline void restore_pamask(CPUMIPSState *env)
 {
     if (env->hflags & MIPS_HFLAG_ELPA) {

diff --git a/target/mips/kvm.c b/target/mips/kvm.c
index 477692566a4fbebeb2de61de277c102333d2bf2e..a5b6fe35dbce6e1160db3e1b739257572ba9e3b6 100644 (file)
--- a/target/mips/kvm.c
+++ b/target/mips/kvm.c
@@ -24,6 +24,7 @@
 #include "sysemu/runstate.h"
 #include "kvm_mips.h"
 #include "hw/boards.h"
+#include "fpu_helper.h"
 
 #define DEBUG_KVM 0
 

diff --git a/target/mips/machine.c b/target/mips/machine.c
index 77afe654e91477ab928782dbb502ce774b0d8f3c..b5fda6a278646e5e4d7d39b89874efc94cf88d31 100644 (file)
--- a/target/mips/machine.c
+++ b/target/mips/machine.c
@@ -2,6 +2,7 @@
 #include "cpu.h"
 #include "internal.h"
 #include "migration/cpu.h"
+#include "fpu_helper.h"
 
 static int cpu_post_load(void *opaque, int version_id)
 {

diff --git a/target/mips/msa_helper.c b/target/mips/msa_helper.c
index 249f0fdad802452c2a39394450f8464443007fc3..b89b4c4490282b432afc1edb28f4d7554976b788 100644 (file)
--- a/target/mips/msa_helper.c
+++ b/target/mips/msa_helper.c
@@ -23,6 +23,7 @@
 #include "exec/exec-all.h"
 #include "exec/helper-proto.h"
 #include "fpu/softfloat.h"
+#include "fpu_helper.h"
 
 /* Data format min and max values */
 #define DF_BITS(df) (1 << ((df) + 3))

diff --git a/target/mips/op_helper.c b/target/mips/op_helper.c
index 5aa97902e98137cd56163571d4e2be5e75ba92fe..3386b8228e95817fa030259d400323dec6354a70 100644 (file)
--- a/target/mips/op_helper.c
+++ b/target/mips/op_helper.c
@@ -24,7 +24,7 @@
 #include "exec/helper-proto.h"
 #include "exec/exec-all.h"
 #include "exec/memop.h"
-
+#include "fpu_helper.h"
 
 /*****************************************************************************/
 /* Exceptions processing helpers */

diff --git a/target/mips/translate.c b/target/mips/translate.c
index e813add99c50f998739728309e0f2413946acc74..f8f0f95509c578321ea68eb3fd99422f910c2528 100644 (file)
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -35,6 +35,7 @@
 #include "exec/translator.h"
 #include "exec/log.h"
 #include "qemu/qemu-print.h"
+#include "fpu_helper.h"
 
 #define MIPS_DEBUG_DISAS 0
 

diff --git a/target/mips/translate_init.c.inc b/target/mips/translate_init.c.inc
index 0ba3cf18ef73e1ad1cb9406419d3292611c7fd8f..044052fb77c91383f8e813e32b1f3c818fbae741 100644 (file)
--- a/target/mips/translate_init.c.inc
+++ b/target/mips/translate_init.c.inc
@@ -18,6 +18,8 @@
  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  */
 
+#include "fpu_helper.h"
+
 /* CPU / CPU family specific config register values. */
 
 /* Have config1, uncached coherency */