mips: dts: ralink: mt7621: reorder serial0 properties
authorJustin Swartz <justin.swartz@risingedge.co.za>
Fri, 8 Mar 2024 15:56:15 +0000 (17:56 +0200)
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>
Mon, 11 Mar 2024 12:58:06 +0000 (13:58 +0100)
Reorder serial0 properties according to the guidelines laid
out in Documentation/devicetree/bindings/dts-coding-style.rst

Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za>
Reviewed-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
arch/mips/boot/dts/ralink/mt7621.dtsi

index dca415fddd90bdbbe97de4f6e934029ee4efc24b..68467fca3fc9508754a697f13644e8a7de97e2fb 100644 (file)
                        compatible = "ns16550a";
                        reg = <0xc00 0x100>;
 
+                       reg-io-width = <4>;
+                       reg-shift = <2>;
+
                        clocks = <&sysc MT7621_CLK_UART1>;
 
                        interrupt-parent = <&gic>;
                        interrupts = <GIC_SHARED 26 IRQ_TYPE_LEVEL_HIGH>;
 
-                       reg-shift = <2>;
-                       reg-io-width = <4>;
                        no-loopback-test;
 
                        pinctrl-names = "default";