static unsigned long hpwdt_is_open;
 
 static void __iomem *pci_mem_addr;             /* the PCI-memory address */
+static unsigned long __iomem *hpwdt_nmistat;
 static unsigned long __iomem *hpwdt_timer_reg;
 static unsigned long __iomem *hpwdt_timer_con;
 
        return TICKS_TO_SECS(ioread16(hpwdt_timer_reg));
 }
 
+static int hpwdt_my_nmi(void)
+{
+       return ioread8(hpwdt_nmistat) & 0x6;
+}
+
 #ifdef CONFIG_HPWDT_NMI_DECODING
 /*
  *     NMI Handler
        if (!hpwdt_nmi_decoding)
                return NMI_DONE;
 
+       if ((ulReason == NMI_UNKNOWN) && !hpwdt_my_nmi())
+               return NMI_DONE;
+
        spin_lock_irqsave(&rom_lock, rom_pl);
        if (!die_nmi_called && !is_icru && !is_uefi)
                asminline_call(&cmn_regs, cru_rom_addr);
                retval = -ENOMEM;
                goto error_pci_iomap;
        }
+       hpwdt_nmistat   = pci_mem_addr + 0x6e;
        hpwdt_timer_reg = pci_mem_addr + 0x70;
        hpwdt_timer_con = pci_mem_addr + 0x72;