ARM: dts: rockchip: raise CPU trip point temperature for veyron to 100 degC

This value matches what is used by the downstream Chrome OS 3.14
kernel, the 'official' kernel for veyron devices. Keep the temperature
for 'speedy' at 90°C, as in the downstream kernel.

Increase the temperature for a hardware shutdown to 125°C, which
matches the downstream configuration and gives the system a chance
to shut down orderly at the criticial trip point.

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm/boot/dts/rk3288-veyron-speedy.dts b/arch/arm/boot/dts/rk3288-veyron-speedy.dts
index 2ac8748a3a0cc0fc22d33b40bc53f49cceecd730..b07a07e81551cd458fdb5652d531e8e8de80a54b 100644 (file)
--- a/arch/arm/boot/dts/rk3288-veyron-speedy.dts
+++ b/arch/arm/boot/dts/rk3288-veyron-speedy.dts
@@ -64,6 +64,10 @@
        temperature = <70000>;
 };
 
+&cpu_crit {
+       temperature = <90000>;
+};
+
 &edp {
        /delete-property/pinctrl-names;
        /delete-property/pinctrl-0;

diff --git a/arch/arm/boot/dts/rk3288-veyron.dtsi b/arch/arm/boot/dts/rk3288-veyron.dtsi
index 1252522392c73f475150061672cff5251773a4e5..e81f1a0cac83d5e0aa039bafb1983c5cbace7e43 100644 (file)
--- a/arch/arm/boot/dts/rk3288-veyron.dtsi
+++ b/arch/arm/boot/dts/rk3288-veyron.dtsi
@@ -123,6 +123,10 @@
        cpu0-supply = <&vdd_cpu>;
 };
 
+&cpu_crit {
+       temperature = <100000>;
+};
+
 /* rk3288-c used in Veyron Chrome-devices has slightly changed OPPs */
 &cpu_opp_table {
        /delete-node/ opp-312000000;
@@ -394,6 +398,7 @@
 
        rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
        rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
+       rockchip,hw-tshut-temp = <125000>;
 };
 
 &uart0 {