perf powerpc: Add support to expose instruction and data address registers as part...

This patch enables presenting Sampled Instruction Address Register
(SIAR) and Sampled Data Address Register (SDAR) SPRs as part of extended
registers for the perf tool.

Add these SPR's to sample_reg_mask in the tool side (to use with -I?
option).

Reviewed-by: Kajol Jain <kjain@linux.ibm.com>
Signed-off-by: Athira Jajeev <atrajeev@linux.vnet.ibm.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Nageswara R Sastry <rnsastry@linux.ibm.com>
Cc: linuxppc-dev@lists.ozlabs.org
Link: https://lore.kernel.org/r/20211018114948.16830-3-atrajeev@linux.vnet.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>

diff --git a/tools/arch/powerpc/include/uapi/asm/perf_regs.h b/tools/arch/powerpc/include/uapi/asm/perf_regs.h
index 085094553f3b031ce919247625b0a10709f777d4..749a2e3af89e51904e8d85b713e0d5b620a5f437 100644 (file)
--- a/tools/arch/powerpc/include/uapi/asm/perf_regs.h
+++ b/tools/arch/powerpc/include/uapi/asm/perf_regs.h
@@ -61,17 +61,19 @@ enum perf_event_powerpc_regs {
        PERF_REG_POWERPC_PMC4,
        PERF_REG_POWERPC_PMC5,
        PERF_REG_POWERPC_PMC6,
+       PERF_REG_POWERPC_SDAR,
+       PERF_REG_POWERPC_SIAR,
        /* Max mask value for interrupt regs w/o extended regs */
        PERF_REG_POWERPC_MAX = PERF_REG_POWERPC_MMCRA + 1,
        /* Max mask value for interrupt regs including extended regs */
-       PERF_REG_EXTENDED_MAX = PERF_REG_POWERPC_PMC6 + 1,
+       PERF_REG_EXTENDED_MAX = PERF_REG_POWERPC_SIAR + 1,
 };
 
 #define PERF_REG_PMU_MASK      ((1ULL << PERF_REG_POWERPC_MAX) - 1)
 
 /*
  * PERF_REG_EXTENDED_MASK value for CPU_FTR_ARCH_300
- * includes 9 SPRS from MMCR0 to PMC6 excluding the
+ * includes 11 SPRS from MMCR0 to SIAR excluding the
  * unsupported SPRS MMCR3, SIER2 and SIER3.
  */
 #define PERF_REG_PMU_MASK_300  \
@@ -79,11 +81,12 @@ enum perf_event_powerpc_regs {
        (1ULL << PERF_REG_POWERPC_MMCR2) | (1ULL << PERF_REG_POWERPC_PMC1) | \
        (1ULL << PERF_REG_POWERPC_PMC2) | (1ULL << PERF_REG_POWERPC_PMC3) | \
        (1ULL << PERF_REG_POWERPC_PMC4) | (1ULL << PERF_REG_POWERPC_PMC5) | \
-       (1ULL << PERF_REG_POWERPC_PMC6))
+       (1ULL << PERF_REG_POWERPC_PMC6) | (1ULL << PERF_REG_POWERPC_SDAR) | \
+       (1ULL << PERF_REG_POWERPC_SIAR))
 
 /*
  * PERF_REG_EXTENDED_MASK value for CPU_FTR_ARCH_31
- * includes 12 SPRs from MMCR0 to PMC6.
+ * includes 14 SPRs from MMCR0 to SIAR.
  */
 #define PERF_REG_PMU_MASK_31   \
        (PERF_REG_PMU_MASK_300 | (1ULL << PERF_REG_POWERPC_MMCR3) | \

diff --git a/tools/perf/arch/powerpc/include/perf_regs.h b/tools/perf/arch/powerpc/include/perf_regs.h
index 04e5dc07e93f8812adeb1903b5de8f64b468a11c..93339d17acc46a83ed03f70c2d446a7da097b764 100644 (file)
--- a/tools/perf/arch/powerpc/include/perf_regs.h
+++ b/tools/perf/arch/powerpc/include/perf_regs.h
@@ -77,6 +77,8 @@ static const char *reg_names[] = {
        [PERF_REG_POWERPC_PMC4] = "pmc4",
        [PERF_REG_POWERPC_PMC5] = "pmc5",
        [PERF_REG_POWERPC_PMC6] = "pmc6",
+       [PERF_REG_POWERPC_SDAR] = "sdar",
+       [PERF_REG_POWERPC_SIAR] = "siar",
 };
 
 static inline const char *__perf_reg_name(int id)

diff --git a/tools/perf/arch/powerpc/util/perf_regs.c b/tools/perf/arch/powerpc/util/perf_regs.c
index 8116a253f91f4ce60da7210a2893831d409dd982..8d07a78e742ab911d709a95c46ea8f74d2ee07f8 100644 (file)
--- a/tools/perf/arch/powerpc/util/perf_regs.c
+++ b/tools/perf/arch/powerpc/util/perf_regs.c
@@ -74,6 +74,8 @@ const struct sample_reg sample_reg_masks[] = {
        SMPL_REG(pmc4, PERF_REG_POWERPC_PMC4),
        SMPL_REG(pmc5, PERF_REG_POWERPC_PMC5),
        SMPL_REG(pmc6, PERF_REG_POWERPC_PMC6),
+       SMPL_REG(sdar, PERF_REG_POWERPC_SDAR),
+       SMPL_REG(siar, PERF_REG_POWERPC_SIAR),
        SMPL_REG_END
 };