MIPS: KVM: Emulate generic QEMU machine on r6 T&E

Default the guest PRId register to represent a generic QEMU machine
instead of a 24kc on MIPSr6. 24kc isn't supported by r6 Linux kernels.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Radim KrÄmář <rkrcmar@redhat.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

diff --git a/arch/mips/kvm/trap_emul.c b/arch/mips/kvm/trap_emul.c
index 00e8dc3d36cb1c99013d31905db0d2ad18b82864..091553942bcbca51941fa768b67bdcc3f5dfecdc 100644 (file)
--- a/arch/mips/kvm/trap_emul.c
+++ b/arch/mips/kvm/trap_emul.c
@@ -431,9 +431,15 @@ static int kvm_trap_emul_vcpu_setup(struct kvm_vcpu *vcpu)
 
        /*
         * Arch specific stuff, set up config registers properly so that the
-        * guest will come up as expected, for now we simulate a MIPS 24kc
+        * guest will come up as expected
         */
+#ifndef CONFIG_CPU_MIPSR6
+       /* r2-r5, simulate a MIPS 24kc */
        kvm_write_c0_guest_prid(cop0, 0x00019300);
+#else
+       /* r6+, simulate a generic QEMU machine */
+       kvm_write_c0_guest_prid(cop0, 0x00010000);
+#endif
        /*
         * Have config1, Cacheable, noncoherent, write-back, write allocate.
         * Endianness, arch revision & virtually tagged icache should match