arm64: dts: imx8mm: don't assign PLL2 in SoC dtsi

The base i.MX8MM dtsi changes the audio PLL2 rate, which gets in the
way if it should be used for anything else than audio. As this PLL doesn't
seem to be used by any upstream supported board, just remove the rate
configuration to allow boards to set it up as they wish.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index c84d76860441722f77f5071760797b84277247c4..f77f90ed416f9101f58c3be40adc59bb0c9e7082 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -619,8 +619,7 @@
                                                <&clk IMX8MM_CLK_IPG_AUDIO_ROOT>,
                                                <&clk IMX8MM_SYS_PLL3>,
                                                <&clk IMX8MM_VIDEO_PLL1>,
-                                               <&clk IMX8MM_AUDIO_PLL1>,
-                                               <&clk IMX8MM_AUDIO_PLL2>;
+                                               <&clk IMX8MM_AUDIO_PLL1>;
                                assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_800M>,
                                                         <&clk IMX8MM_ARM_PLL_OUT>,
                                                         <&clk IMX8MM_SYS_PLL3_OUT>,
@@ -630,8 +629,7 @@
                                                        <400000000>,
                                                        <750000000>,
                                                        <594000000>,
-                                                       <393216000>,
-                                                       <361267200>;
+                                                       <393216000>;
                        };
 
                        src: reset-controller@30390000 {