drm/i915/xelpg: Extend driver code of Xe_LPG to Xe_LPG+

Xe_LPG+ (IP version 12.74) should take the same general code
paths as Xe_LPG (versions 12.70 and 12.71).

Xe_LPG+'s workaround list will be handled by the next patch.

Signed-off-by: Harish Chegondi <harish.chegondi@intel.com>
Signed-off-by: Haridhar Kalvala <haridhar.kalvala@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240108122738.14399-3-haridhar.kalvala@intel.com

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 40687806d22a6dc1d1dd797f7dc64ee970517daf..1ade568ffbfa43409129228881abe60d965e8d10 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -1190,7 +1190,8 @@ static int intel_engine_init_tlb_invalidation(struct intel_engine_cs *engine)
                        num = ARRAY_SIZE(xelpmp_regs);
                }
        } else {
-               if (GRAPHICS_VER_FULL(i915) == IP_VER(12, 71) ||
+               if (GRAPHICS_VER_FULL(i915) == IP_VER(12, 74) ||
+                   GRAPHICS_VER_FULL(i915) == IP_VER(12, 71) ||
                    GRAPHICS_VER_FULL(i915) == IP_VER(12, 70) ||
                    GRAPHICS_VER_FULL(i915) == IP_VER(12, 50) ||
                    GRAPHICS_VER_FULL(i915) == IP_VER(12, 55)) {

diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c b/drivers/gpu/drm/i915/gt/intel_mocs.c
index 353f93baaca051d1c21a7fd361c43a2efa488c72..25c1023eb5f9fa5afd63fc48c3847e2a57cdaafd 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_mocs.c
+++ b/drivers/gpu/drm/i915/gt/intel_mocs.c
@@ -495,7 +495,7 @@ static unsigned int get_mocs_settings(struct drm_i915_private *i915,
        memset(table, 0, sizeof(struct drm_i915_mocs_table));
 
        table->unused_entries_index = I915_MOCS_PTE;
-       if (IS_GFX_GT_IP_RANGE(to_gt(i915), IP_VER(12, 70), IP_VER(12, 71))) {
+       if (IS_GFX_GT_IP_RANGE(to_gt(i915), IP_VER(12, 70), IP_VER(12, 74))) {
                table->size = ARRAY_SIZE(mtl_mocs_table);
                table->table = mtl_mocs_table;
                table->n_entries = MTL_NUM_MOCS_ENTRIES;

diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c b/drivers/gpu/drm/i915/gt/intel_rc6.c
index 7090e4be29cb69bb6f2fdf459cf4062fc4a1ce3a..8f4b3c8af09cce57a71bfb93a2b7d0c32ac473f8 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_rc6.c
+++ b/drivers/gpu/drm/i915/gt/intel_rc6.c
@@ -123,7 +123,7 @@ static void gen11_rc6_enable(struct intel_rc6 *rc6)
         * temporary wa and should be removed after fixing real cause
         * of forcewake timeouts.
         */
-       if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 71)))
+       if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 74)))
                pg_enable =
                        GEN9_MEDIA_PG_ENABLE |
                        GEN11_MEDIA_SAMPLER_PG_ENABLE;

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index beffac46a5e29bba43c4e83ddcb03295b80bbecf..a5410b41744c6d41388e1d1874364365ea6bc18a 100644 (file)
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -145,7 +145,7 @@ static const char *i915_cache_level_str(struct drm_i915_gem_object *obj)
 {
        struct drm_i915_private *i915 = obj_to_i915(obj);
 
-       if (IS_GFX_GT_IP_RANGE(to_gt(i915), IP_VER(12, 70), IP_VER(12, 71))) {
+       if (IS_GFX_GT_IP_RANGE(to_gt(i915), IP_VER(12, 70), IP_VER(12, 74))) {
                switch (obj->pat_index) {
                case 0: return " WB";
                case 1: return " WT";