arm64: dts: ls1043a: Add SCFG phandle for PCIe nodes

The LS1043A PCIe controller has some control registers
in SCFG block, so add the SCFG phandle for each PCIe
controller node.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
index d04d4ac66d2aaa92938d1b6a9dcf43efbaad9247..e1c5d685a9e3d47aaf863b5c77e154a233cada69 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
@@ -901,6 +901,7 @@
                                        <0000 0 0 2 &gic 0 111 0x4>,
                                        <0000 0 0 3 &gic 0 112 0x4>,
                                        <0000 0 0 4 &gic 0 113 0x4>;
+                       fsl,pcie-scfg = <&scfg 0>;
                        status = "disabled";
                };
 
@@ -927,6 +928,7 @@
                                        <0000 0 0 2 &gic 0 121 0x4>,
                                        <0000 0 0 3 &gic 0 122 0x4>,
                                        <0000 0 0 4 &gic 0 123 0x4>;
+                       fsl,pcie-scfg = <&scfg 1>;
                        status = "disabled";
                };
 
@@ -953,6 +955,7 @@
                                        <0000 0 0 2 &gic 0 155 0x4>,
                                        <0000 0 0 3 &gic 0 156 0x4>,
                                        <0000 0 0 4 &gic 0 157 0x4>;
+                       fsl,pcie-scfg = <&scfg 2>;
                        status = "disabled";
                };