scsi: ufs: ufs-hisi: Use device parameter initialization function

Use common device parameter initialization function instead of initializing
those parameters by vendor driver itself.

Link: https://lore.kernel.org/r/20201116065054.7658-7-stanley.chu@mediatek.com
Reviewed-by: Bean Huo <beanhuo@micron.com>
Signed-off-by: Stanley Chu <stanley.chu@mediatek.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

diff --git a/drivers/scsi/ufs/ufs-hisi.c b/drivers/scsi/ufs/ufs-hisi.c
index 074a6a055a4c06134241db6b03fa57e14a0b0a7a..0aa58131e7915add4d8bc3fca57c8290817de7ac 100644 (file)
--- a/drivers/scsi/ufs/ufs-hisi.c
+++ b/drivers/scsi/ufs/ufs-hisi.c
@@ -293,18 +293,7 @@ static int ufs_hisi_link_startup_notify(struct ufs_hba *hba,
 
 static void ufs_hisi_set_dev_cap(struct ufs_dev_params *hisi_param)
 {
-       hisi_param->rx_lanes = UFS_HISI_LIMIT_NUM_LANES_RX;
-       hisi_param->tx_lanes = UFS_HISI_LIMIT_NUM_LANES_TX;
-       hisi_param->hs_rx_gear = UFS_HISI_LIMIT_HSGEAR_RX;
-       hisi_param->hs_tx_gear = UFS_HISI_LIMIT_HSGEAR_TX;
-       hisi_param->pwm_rx_gear = UFS_HISI_LIMIT_PWMGEAR_RX;
-       hisi_param->pwm_tx_gear = UFS_HISI_LIMIT_PWMGEAR_TX;
-       hisi_param->rx_pwr_pwm = UFS_HISI_LIMIT_RX_PWR_PWM;
-       hisi_param->tx_pwr_pwm = UFS_HISI_LIMIT_TX_PWR_PWM;
-       hisi_param->rx_pwr_hs = UFS_HISI_LIMIT_RX_PWR_HS;
-       hisi_param->tx_pwr_hs = UFS_HISI_LIMIT_TX_PWR_HS;
-       hisi_param->hs_rate = UFS_HISI_LIMIT_HS_RATE;
-       hisi_param->desired_working_mode = UFS_HISI_LIMIT_DESIRED_MODE;
+       ufshcd_init_pwr_dev_param(hisi_param);
 }
 
 static void ufs_hisi_pwr_change_pre_change(struct ufs_hba *hba)

diff --git a/drivers/scsi/ufs/ufs-hisi.h b/drivers/scsi/ufs/ufs-hisi.h
index 3231d3d81c985798e85ab95b412bf1792b7591ca..5a90c0f4e90c7cadad336184b605e9c42f54e9b3 100644 (file)
--- a/drivers/scsi/ufs/ufs-hisi.h
+++ b/drivers/scsi/ufs/ufs-hisi.h
@@ -76,19 +76,6 @@ enum {
 #define SLOW   1
 #define FAST   2
 
-#define UFS_HISI_LIMIT_NUM_LANES_RX    2
-#define UFS_HISI_LIMIT_NUM_LANES_TX    2
-#define UFS_HISI_LIMIT_HSGEAR_RX       UFS_HS_G3
-#define UFS_HISI_LIMIT_HSGEAR_TX       UFS_HS_G3
-#define UFS_HISI_LIMIT_PWMGEAR_RX      UFS_PWM_G4
-#define UFS_HISI_LIMIT_PWMGEAR_TX      UFS_PWM_G4
-#define UFS_HISI_LIMIT_RX_PWR_PWM      SLOW_MODE
-#define UFS_HISI_LIMIT_TX_PWR_PWM      SLOW_MODE
-#define UFS_HISI_LIMIT_RX_PWR_HS       FAST_MODE
-#define UFS_HISI_LIMIT_TX_PWR_HS       FAST_MODE
-#define UFS_HISI_LIMIT_HS_RATE PA_HS_MODE_B
-#define UFS_HISI_LIMIT_DESIRED_MODE    FAST
-
 #define UFS_HISI_CAP_RESERVED          BIT(0)
 #define UFS_HISI_CAP_PHY10nm           BIT(1)