drm/amd/display: DCN35 Disable cm power optimization
authorYihan Zhu <yihan.zhu@amd.com>
Thu, 19 Oct 2023 18:23:17 +0000 (14:23 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 7 Nov 2023 16:17:24 +0000 (11:17 -0500)
[WHY & HOW]
Enabling SCE after boot up will cause color distortion.

Reviewed-by: Ovidiu Bunea <ovidiu.bunea@amd.com>
Acked-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Yihan Zhu <yihan.zhu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c

index 9699adf52e156c71b1b866d78dc26aa7771e1b43..e35d4c028d01865ec778b8b5f49c984eb78d69f4 100644 (file)
@@ -708,7 +708,7 @@ static const struct dc_debug_options debug_defaults_drv = {
                        .i2c = true,
                        .dmcu = false, // This is previously known to cause hang on S3 cycles if enabled
                        .dscl = true,
-                       .cm = true,
+                       .cm = false,
                        .mpc = true,
                        .optc = true,
                        .vpg = true,