arm64: dts: exynos: gs101: enable cmu-hsi2 clock controller
authorPeter Griffin <peter.griffin@linaro.org>
Mon, 29 Apr 2024 13:02:18 +0000 (14:02 +0100)
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Mon, 29 Apr 2024 17:26:00 +0000 (19:26 +0200)
Enable the cmu_hsi2 clock management unit. It feeds some of
the high speed interfaces such as PCIe and UFS.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Signed-off-by: André Draszik <andre.draszik@linaro.org>
Link: https://lore.kernel.org/r/20240429-hsi0-gs101-v3-2-f233be0a2455@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
arch/arm64/boot/dts/exynos/google/gs101.dtsi

index 9755a0bb70a1ae256bd8c523c113b68beaafa446..a0305555c4fd48255bd37c4554135ba334b7773f 100644 (file)
                        interrupts = <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH 0>;
                };
 
+               cmu_hsi2: clock-controller@14400000 {
+                       compatible = "google,gs101-cmu-hsi2";
+                       reg = <0x14400000 0x4000>;
+                       #clock-cells = <1>;
+                       clocks = <&ext_24_5m>,
+                                <&cmu_top CLK_DOUT_CMU_HSI2_BUS>,
+                                <&cmu_top CLK_DOUT_CMU_HSI2_PCIE>,
+                                <&cmu_top CLK_DOUT_CMU_HSI2_UFS_EMBD>,
+                                <&cmu_top CLK_DOUT_CMU_HSI2_MMC_CARD>;
+                       clock-names = "oscclk", "bus", "pcie", "ufs", "mmc";
+               };
+
                pinctrl_hsi2: pinctrl@14440000 {
                        compatible = "google,gs101-pinctrl";
                        reg = <0x14440000 0x00001000>;