fpga: dfl: fix bug in port reset handshake
authorMatthew Gerlach <matthew.gerlach@linux.intel.com>
Mon, 13 Jul 2020 06:10:03 +0000 (14:10 +0800)
committerMoritz Fischer <mdf@kernel.org>
Tue, 14 Jul 2020 05:11:17 +0000 (22:11 -0700)
When putting the port in reset, driver must wait for the soft reset
acknowledgment bit instead of the soft reset bit.

Fixes: 47c1b19c160f (fpga: dfl: afu: add port ops support)
Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
Signed-off-by: Xu Yilun <yilun.xu@intel.com>
Acked-by: Wu Hao <hao.wu@intel.com>
Reviewed-by: Tom Rix <trix@redhat.com>
Signed-off-by: Moritz Fischer <mdf@kernel.org>
drivers/fpga/dfl-afu-main.c

index b0c31789a9096b81e7188397cb9ae6e3017afff9..3fa2c59921733a706d32e25d2597e3a29d292fed 100644 (file)
@@ -83,7 +83,8 @@ int __afu_port_disable(struct platform_device *pdev)
         * on this port and minimum soft reset pulse width has elapsed.
         * Driver polls port_soft_reset_ack to determine if reset done by HW.
         */
-       if (readq_poll_timeout(base + PORT_HDR_CTRL, v, v & PORT_CTRL_SFTRST,
+       if (readq_poll_timeout(base + PORT_HDR_CTRL, v,
+                              v & PORT_CTRL_SFTRST_ACK,
                               RST_POLL_INVL, RST_POLL_TIMEOUT)) {
                dev_err(&pdev->dev, "timeout, fail to reset device\n");
                return -ETIMEDOUT;