drm: xlnx: zynqmp_dpsub: Update live format defines
authorAnatoliy Klymenko <anatoliy.klymenko@amd.com>
Tue, 16 Apr 2024 20:31:37 +0000 (13:31 -0700)
committerTomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Wed, 24 Apr 2024 14:51:17 +0000 (17:51 +0300)
Update live format defines to match DPSUB AV_BUF_LIVE_VID_CONFIG register
layout. These defines were never referenced before, so no other changes
required.

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Anatoliy Klymenko <anatoliy.klymenko@amd.com>
Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240416-dp-live-fmt-v4-2-c7f379b7168e@amd.com
drivers/gpu/drm/xlnx/zynqmp_disp_regs.h

index f92a006d5070cfa277e4903cc598d1ff58cbfac5..fa393538483474d1a936ea36dd08019285b7871d 100644 (file)
 #define ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_BPC_10          0x2
 #define ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_BPC_12          0x3
 #define ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_BPC_MASK                GENMASK(2, 0)
-#define ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_FMT_RGB         0x0
-#define ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_FMT_YUV444      0x1
-#define ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_FMT_YUV422      0x2
-#define ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_FMT_YONLY       0x3
+#define ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_FMT_RGB         (0x0 << 4)
+#define ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_FMT_YUV444      (0x1 << 4)
+#define ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_FMT_YUV422      (0x2 << 4)
+#define ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_FMT_YONLY       (0x3 << 4)
 #define ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_FMT_MASK                GENMASK(5, 4)
 #define ZYNQMP_DISP_AV_BUF_LIVE_CONFIG_CB_FIRST                BIT(8)
 #define ZYNQMP_DISP_AV_BUF_PALETTE_MEMORY              0x400