dt-bindings: timer: new bindings for TI DaVinci timer
authorDavid Lechner <david@lechnology.com>
Fri, 18 May 2018 16:48:26 +0000 (11:48 -0500)
committerSekhar Nori <nsekhar@ti.com>
Tue, 26 Jun 2018 10:47:08 +0000 (16:17 +0530)
This adds new device tree bindings for the timer IP block of TI
DaVinci-like SoCs.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: David Lechner <david@lechnology.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Documentation/devicetree/bindings/timer/ti,davinci-timer.txt [new file with mode: 0644]

diff --git a/Documentation/devicetree/bindings/timer/ti,davinci-timer.txt b/Documentation/devicetree/bindings/timer/ti,davinci-timer.txt
new file mode 100644 (file)
index 0000000..29bf91c
--- /dev/null
@@ -0,0 +1,37 @@
+* Device tree bindings for Texas Instruments DaVinci timer
+
+This document provides bindings for the 64-bit timer in the DaVinci
+architecture devices. The timer can be configured as a general-purpose 64-bit
+timer, dual general-purpose 32-bit timers. When configured as dual 32-bit
+timers, each half can operate in conjunction (chain mode) or independently
+(unchained mode) of each other.
+
+The timer is a free running up-counter and can generate interrupts when the
+counter reaches preset counter values.
+
+Also see ../watchdog/davinci-wdt.txt for timers that are configurable as
+watchdog timers.
+
+Required properties:
+
+- compatible : should be "ti,da830-timer".
+- reg : specifies base physical address and count of the registers.
+- interrupts : interrupts generated by the timer.
+- interrupt-names: should be "tint12", "tint34", "cmpint0", "cmpint1",
+                  "cmpint2", "cmpint3", "cmpint4", "cmpint5", "cmpint6",
+                  "cmpint7" ("cmpintX" may be omitted if not present in the
+                  hardware).
+- clocks : the clock feeding the timer clock.
+
+Example:
+
+       clocksource: timer@20000 {
+               compatible = "ti,da830-timer";
+               reg = <0x20000 0x1000>;
+               interrupts = <21>, <22>, <74>, <75>, <76>, <77>, <78>, <79>,
+                            <80>, <81>;
+               interrupt-names = "tint12", "tint34", "cmpint0", "cmpint1",
+                                 "cmpint2", "cmpint3", "cmpint4", "cmpint5",
+                                 "cmpint6", "cmpint7";
+               clocks = <&pll0_auxclk>;
+       };