arm64: dts: qcom: sc7280: Fix incorrect clock name
authorPrasad Malisetty <pmaliset@codeaurora.org>
Tue, 16 Nov 2021 11:01:46 +0000 (16:31 +0530)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 27 Jan 2022 10:03:15 +0000 (11:03 +0100)
[ Upstream commit fa09b2248714c64644576d8064e9bd292a504a0e ]

Replace pcie_1_pipe-clk clock name with pcie_1_pipe_clk
To match with dt binding.

Fixes: ab7772de8612 ("arm64: dts: qcom: SC7280: Add rpmhcc clock controller node")
Signed-off-by: Prasad Malisetty <pmaliset@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1637060508-30375-2-git-send-email-pmaliset@codeaurora.org
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/arm64/boot/dts/qcom/sc7280.dtsi

index f58336536a92a999ccbcc8dfe315fb33bd120426..692973c4f434483e4c3dbf36c54cd1d5d17b1563 100644 (file)
                                 <&rpmhcc RPMH_CXO_CLK_A>, <&sleep_clk>,
                                 <0>, <0>, <0>, <0>, <0>, <0>;
                        clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk",
-                                     "pcie_0_pipe_clk", "pcie_1_pipe-clk",
+                                     "pcie_0_pipe_clk", "pcie_1_pipe_clk",
                                      "ufs_phy_rx_symbol_0_clk", "ufs_phy_rx_symbol_1_clk",
                                      "ufs_phy_tx_symbol_0_clk",
                                      "usb3_phy_wrapper_gcc_usb30_pipe_clk";