drm/i915/display: add namespace to intel_prepare_reset
authorLucas De Marchi <lucas.demarchi@intel.com>
Fri, 6 Nov 2020 22:55:24 +0000 (14:55 -0800)
committerLucas De Marchi <lucas.demarchi@intel.com>
Wed, 11 Nov 2020 19:50:42 +0000 (11:50 -0800)
Rename intel_prepare_reset to intel_display_prepare_reset, so it's clear
from gt/ that we are calling out the display code.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201106225531.920641-1-lucas.demarchi@intel.com
drivers/gpu/drm/i915/display/intel_display.c
drivers/gpu/drm/i915/display/intel_display.h
drivers/gpu/drm/i915/gt/intel_reset.c

index 63bf3761befc881b973aada6e5ec5a40b51bd4f5..99f2dacede9db573c29b2ffd76d50c03aa1132d2 100644 (file)
@@ -4851,7 +4851,7 @@ static bool gpu_reset_clobbers_display(struct drm_i915_private *dev_priv)
                intel_has_gpu_reset(&dev_priv->gt));
 }
 
-void intel_prepare_reset(struct drm_i915_private *dev_priv)
+void intel_display_prepare_reset(struct drm_i915_private *dev_priv)
 {
        struct drm_device *dev = &dev_priv->drm;
        struct drm_modeset_acquire_ctx *ctx = &dev_priv->reset_ctx;
index be774f216065b36d954d2ee286fbf5696bdc4697..30960cc8b8a6e9bc1900f6bbb4a825a7f87911fc 100644 (file)
@@ -590,7 +590,7 @@ void vlv_force_pll_off(struct drm_i915_private *dev_priv, enum pipe pipe);
 int lpt_get_iclkip(struct drm_i915_private *dev_priv);
 bool intel_fuzzy_clock_check(int clock1, int clock2);
 
-void intel_prepare_reset(struct drm_i915_private *dev_priv);
+void intel_display_prepare_reset(struct drm_i915_private *dev_priv);
 void intel_finish_reset(struct drm_i915_private *dev_priv);
 void intel_dp_get_m_n(struct intel_crtc *crtc,
                      struct intel_crtc_state *pipe_config);
index ac36b67fb46bea97b7c34c827bbe1dc20b1dd70c..2d9d449cecbab08369ca9c05d470a2a0d5759e31 100644 (file)
@@ -1190,7 +1190,7 @@ static void intel_gt_reset_global(struct intel_gt *gt,
 
        /* Use a watchdog to ensure that our reset completes */
        intel_wedge_on_timeout(&w, gt, 5 * HZ) {
-               intel_prepare_reset(gt->i915);
+               intel_display_prepare_reset(gt->i915);
 
                /* Flush everyone using a resource about to be clobbered */
                synchronize_srcu_expedited(&gt->reset.backoff_srcu);