arm64: Add cpuidle context save/restore helpers
authorMarc Zyngier <maz@kernel.org>
Tue, 15 Jun 2021 11:12:24 +0000 (12:12 +0100)
committerWill Deacon <will@kernel.org>
Thu, 17 Jun 2021 17:00:39 +0000 (18:00 +0100)
As we need to start doing some additional work on all idle
paths, let's introduce a set of macros that will perform
the work related to the GICv3 pseudo-NMI idle entry exit.

Stubs are introduced to 32bit ARM for compatibility.
As these helpers are currently unused, there is no functional
change.

Tested-by: Valentin Schneider <valentin.schneider@arm.com>
Reviewed-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20210615111227.2454465-2-maz@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
arch/arm/include/asm/cpuidle.h
arch/arm64/include/asm/cpuidle.h

index 0d67ed682e0772e7bd975ac90612e0499455e0fe..dc8f53f1a21959966d2896381e4fc96a0d31c9e6 100644 (file)
@@ -49,4 +49,9 @@ extern int arm_cpuidle_suspend(int index);
 
 extern int arm_cpuidle_init(int cpu);
 
+struct arm_cpuidle_irq_context { };
+
+#define arm_cpuidle_save_irq_context(c)                (void)c
+#define arm_cpuidle_restore_irq_context(c)     (void)c
+
 #endif
index 3c5ddb429ea29bc925d959d2b382e59bca6a885f..14a19d1141bd22de1f854bc69fc00fba37ea30e2 100644 (file)
@@ -18,4 +18,39 @@ static inline int arm_cpuidle_suspend(int index)
        return -EOPNOTSUPP;
 }
 #endif
+
+#ifdef CONFIG_ARM64_PSEUDO_NMI
+#include <asm/arch_gicv3.h>
+
+struct arm_cpuidle_irq_context {
+       unsigned long pmr;
+       unsigned long daif_bits;
+};
+
+#define arm_cpuidle_save_irq_context(__c)                              \
+       do {                                                            \
+               struct arm_cpuidle_irq_context *c = __c;                \
+               if (system_uses_irq_prio_masking()) {                   \
+                       c->daif_bits = read_sysreg(daif);               \
+                       write_sysreg(c->daif_bits | PSR_I_BIT | PSR_F_BIT, \
+                                    daif);                             \
+                       c->pmr = gic_read_pmr();                        \
+                       gic_write_pmr(GIC_PRIO_IRQON | GIC_PRIO_PSR_I_SET); \
+               }                                                       \
+       } while (0)
+
+#define arm_cpuidle_restore_irq_context(__c)                           \
+       do {                                                            \
+               struct arm_cpuidle_irq_context *c = __c;                \
+               if (system_uses_irq_prio_masking()) {                   \
+                       gic_write_pmr(c->pmr);                          \
+                       write_sysreg(c->daif_bits, daif);               \
+               }                                                       \
+       } while (0)
+#else
+struct arm_cpuidle_irq_context { };
+
+#define arm_cpuidle_save_irq_context(c)                (void)c
+#define arm_cpuidle_restore_irq_context(c)     (void)c
+#endif
 #endif